Benchmark
non-incremental/QF_UFBV/2018-Goel-hwbench/QF_UFBV_bv8_bv_h_Vending_ab_cti_max.smt2
Generated by the tool Averroes 2 (successor of [1]) which implements safety property
verification on hardware systems.
This SMT problem belongs to a set of SMT problems generated by applying Averroes 2
to benchmarks derived from [2-5].
A total of 412 systems (345 from [2], 19 from [3], 26 from [4], 22 from [5]) were
syntactically converted from their original formats (using [6, 7]), and given to
Averroes 2 to perform property checking with abstraction (wide bit-vectors -> terms,
wide operators -> UF) using SMT solvers [8, 9].
[1] Lee S., Sakallah K.A. (2014) Unbounded Scalable Verification Based on Approximate
Property-Directed Reachability and Datapath Abstraction. In: Biere A., Bloem R. (eds)
Computer Aided Verification. CAV 2014. Lecture Notes in Computer Science, vol 8559.
Springer, Cham
[2] http://fmv.jku.at/aiger/index.html#beem
[3] http://www.cs.cmu.edu/~modelcheck/vcegar
[4] http://www.cprover.org/hardware/v2c
[5] http://github.com/aman-goel/verilogbench
[6] http://www.clifford.at/yosys
[7] http://github.com/chengyinwu/V3
[8] http://github.com/Z3Prover/z3
[9] http://github.com/SRI-CSL/yices2
id: h_Vending
query-maker: "Z3"
query-time: 59.476000 ms
query-class: abstract
query-category: oneshot
query-type: cti
status: sat
mode: abstract_bv8
| Benchmark |
|---|
| Size | 45406 |
| Compressed Size | 7283 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2018-07-14 |
| Generated By | Aman Goel (amangoel@umich.edu), Karem A. Sakallah (karem@umich.edu) |
| Generated On | 2018-04-06 00:00:00 |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | sat |
| Size | 45398 |
| Compressed Size | 7309 |
| Max. Term Depth | 33 |
| Asserts | 375 |
| Declared Functions | 0 |
| Declared Constants | 397 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
true | 21 |
ite | 321 |
or | 19 |
and | 68 |
= | 832 |
distinct | 21 |
let | 135 |
concat | 16 |
extract | 8 |
bvadd | 13 |
bvsub | 4 |
bvult | 1 |
bvugt | 2 |
bvuge | 2 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2018
|
|
Boolector |
Boolector_default |
sat ✅
|
0.12384
|
0.12375
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
sat ✅
|
0.08536
|
0.08553
|
| |
MathSAT |
mathsat-5.5.2-linux-x86_64-Main_default |
sat ✅
|
0.04764
|
0.04864
|
| |
Yices2 |
Yices 2.6.0_default |
sat ✅
|
0.01005
|
0.00998
|
| |
Z3 |
z3-4.7.1_default |
sat ✅
|
0.05188
|
0.05182
|