Benchmark
non-incremental/QF_LRA/latendresse/ecoliMILPglycerolYices3-90000.smt2
A set of problems that originated from an analysis of biochemical reactions using the flux-balance analysis method. See """Sum of Infeasibility Simplex for SMT""" by Timothy King, Clark Barrett, and Bruno Dutertre. In Proceedings of the 13th International Conference on Formal Methods In Computer-Aided Design (FMCAD '13), Nov. 2013.
| Benchmark |
| Size | 317722 |
| Compressed Size | 36694 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2014-07-21 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | sat |
| Size | 317714 |
| Compressed Size | 36702 |
| Max. Term Depth | 5 |
| Asserts | 2857 |
| Declared Functions | 0 |
| Declared Constants | 1798 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 1 |
| Declared Datatypes | 0 |
Symbols
or | 52 |
and | 1746 |
= | 1110 |
Real | 1 |
/ | 1774 |
+ | 1059 |
- | 5257 |
* | 5556 |
<= | 3596 |
>= | 1 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2014
|
0.67 (2/6) |
CVC4 |
CVC4 f7118b2 default |
sat ✅
|
34.39980
|
34.39880
|
| |
MathSAT |
MathSAT-5.2.12-Main default |
unknown ❌
|
2399.12000
|
2400.10000
|
| |
SMTInterpol |
smtinterpol-2.1-118-g3dada2f default |
sat ✅
|
393.64100
|
408.84700
|
| |
veriT |
veriT-smtcomp2014 default |
unknown ❌
|
2399.61000
|
2400.11000
|
| |
Yices2 |
Yices-2.2.1-smtcomp2014 default |
unknown ❌
|
2399.02000
|
2400.03000
|
| |
Z3 |
Z3-4.3.2.a054b099c1d6-x64-debian-6.0.6-SMT-COMP-2014 default |
unknown ❌
|
2399.41000
|
2400.08000
|
|
SMT-COMP 2015
|
0.86 (1/7) |
CVC4 |
CVC4-master-2015-06-15-9b32405-main default |
sat ✅
|
25.25230
|
25.25520
|
| |
|
CVC4-experimental-2015-06-15-ff5745a-main default |
sat ✅
|
25.37090
|
25.37710
|
| |
MathSAT |
MathSat 5.3.6 main smtcomp2015_main |
unknown ❌
|
2400.01000
|
2400.99000
|
| |
SMTInterpol |
SMTInterpol v2.1-206-g86e9531 default |
unknown ❌
|
2400.02000
|
2745.29000
|
| |
SMT-RAT |
SMT-RAT-final default |
unknown ❌
|
2400.01000
|
2400.98000
|
| |
veriT |
veriT default |
unknown ❌
|
2400.01000
|
2401.17000
|
| |
Yices2 |
Yices default |
unknown ❌
|
2400.01000
|
2400.99000
|
| |
Z3 |
z3 4.4.0 default |
unknown ❌
|
2400.01000
|
2400.88000
|
|
SMT-COMP 2016
|
0.78 (2/9) |
CVC4 |
CVC4-master-2016-05-27-cfef263-main default |
sat ✅
|
67.21880
|
67.23570
|
| |
MathSAT |
mathsat-5.3.11-linux-x86_64-Main default |
unknown ❌
|
2400.01000
|
2401.41000
|
| |
OpenSMT |
OpenSMT2-2016-05-12 default |
unknown ❌
|
2400.03000
|
2401.27000
|
| |
SMTInterpol |
smtinterpol-2.1-258-g92ab3df default |
sat ✅
|
348.36400
|
362.27500
|
| |
SMT-RAT |
SMT-RAT default |
unknown ❌
|
2400.02000
|
2401.61000
|
| |
Toysmt |
toysmt default |
unknown ❌
|
2400.02000
|
2400.25000
|
| |
veriT |
veriT-dev default |
unknown ❌
|
2400.11000
|
2401.45000
|
| |
Yices2 |
Yices-2.4.2 default |
unknown ❌
|
2400.02000
|
2401.59000
|
| |
Z3 |
z3-4.4.1 default |
unknown ❌
|
2400.09000
|
2401.47000
|
|
SMT-COMP 2017
|
0.75 (2/8) |
CVC4 |
CVC4-smtcomp2017-main default |
sat ✅
|
75.08950
|
75.07200
|
| |
MathSAT |
mathsat-5.4.1-linux-x86_64-Main default |
unknown ❌
|
600.02200
|
599.94500
|
| |
OpenSMT |
opensmt2-2017-06-04 default |
unknown ❌
|
600.01600
|
599.92800
|
| |
SMTInterpol |
SMTInterpol default |
sat ✅
|
66.28020
|
79.38680
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.02000
|
600.02300
|
| |
veriT |
veriT-2017-06-17 default |
unknown ❌
|
600.02800
|
599.93600
|
| |
Yices2 |
Yices2-Main default |
unknown ❌
|
600.02000
|
600.03600
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.09600
|
600.06200
|
|
SMT-COMP 2018
|
0.78 (2/9) |
Ctrl-Ergo |
Ctrl-Ergo-SMTComp-2018_default |
unknown ❌
|
1200.06000
|
4773.71000
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
sat ✅
|
86.69910
|
86.68470
|
| |
MathSAT |
mathsat-5.5.2-linux-x86_64-Main_default |
sat ✅
|
801.31300
|
801.28200
|
| |
OpenSMT |
opensmt2_default |
unknown ❌
|
1200.11000
|
1200.00000
|
| |
SMTInterpol |
SMTInterpol-2.5-19-g0d39cdee_default |
unknown ❌
|
1200.02000
|
1237.57000
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.02000
|
1199.99000
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.02000
|
1199.96000
|
| |
veriT |
veriT_default |
unknown ❌
|
1200.11000
|
1200.02000
|
| |
Yices2 |
Yices 2.6.0_default |
unknown ❌
|
1200.02000
|
1199.95000
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.02000
|
1199.95000
|
|
SMT-COMP 2019
|
0.62 (3/8) |
Ctrl-Ergo |
Ctrl-Ergo-2019-wrapped-sq_default |
unknown ❌
|
2400.06000
|
9533.89000
|
| |
CVC4 |
CVC4-2019-06-03-d350fe1-wrapped-sq_default |
sat ✅
|
26.32990
|
26.33060
|
| |
|
CVC4-SymBreak_03_06_2019-wrapped-sq_default |
sat ✅
|
38.40550
|
38.40510
|
| |
|
master-2018-06-10-b19c840-competition-default_default |
sat ✅
|
29.71970
|
29.71200
|
| |
OpenSMT |
OpenSMT-wrapped-sq_default |
unknown ❌
|
2400.10000
|
2400.05000
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
36.33320
|
142.39000
|
| |
SMTInterpol |
smtinterpol-2.5-514-wrapped-sq_default |
sat ✅
|
273.48100
|
289.78700
|
| |
veriT |
veriT-wrapped-sq_default |
unknown ❌
|
2400.10000
|
2400.20000
|
| |
Yices2 |
Yices 2.6.2-wrapped-sq_default |
unknown ❌
|
2400.10000
|
2399.82000
|
| |
Z3 |
z3-4.8.4-d6df51951f4c-wrapped-sq_default |
unknown ❌
|
2400.08000
|
2400.01000
|
|
SMT-COMP 2025
|
0.67 (2/6) |
cvc5 |
cvc5 |
sat ✅
|
45.15818
|
45.01668
|
| |
OpenSMT |
OpenSMT |
unknown ❌
|
1201.25493
|
1200.98958
|
| |
SMTInterpol |
SMTInterpol |
sat ✅
|
141.99763
|
155.26159
|
| |
Yices2 |
Yices2 |
unknown ❌
|
1201.26072
|
1201.02379
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.00336
|
4801.32756
|
| |
Z3 |
Z3-alpha-base |
unknown ❌
|
1201.25421
|
1201.05265
|