Benchmark

non-incremental/QF_LRA/2017-Heizmann-UltimateInvariantSynthesis/_gj2007.c.i_4_3_3.bpl_11.smt2

Generated by a component of the Ultimate program analysis framework [1] 
that implements a constraint-based synthesis of invariants [2].

This SMT script belongs to a set of SMT scripts that was generated by 
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].

This script might _not_ contain all SMT commands that are used by 
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.

2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)


[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant 
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results - 
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
Benchmark
Size628051
Compressed Size11908
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2017-07-23
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK
check-sat calls1
Query 1
Status unknown
Inferred Status None
Size 628043
Compressed Size11895
Max. Term Depth8
Asserts 322
Declared Functions0
Declared Constants309
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or393 and352 =2528 +10224
-6970 *17962 <353 <=353
>353 >=280

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2017 1.00 (0/8) CVC4 CVC4-smtcomp2017-main default unknown ❌ 600.10000 600.07300
MathSAT mathsat-5.4.1-linux-x86_64-Main default unknown ❌ 600.02600 599.97800
OpenSMT opensmt2-2017-06-04 default unknown ❌ 600.02900 600.00800
SMTInterpol SMTInterpol default unknown ❌ 600.03100 715.04000
SMT-RAT SMTRAT-comp2017_2 default unknown ❌ 600.05200 600.00600
veriT veriT-2017-06-17 default unknown ❌ 600.04100 599.98500
Yices2 Yices2-Main default unknown ❌ 600.10200 600.03800
Z3 z3-4.5.0 default unknown ❌ 600.03400 600.04700
SMT-COMP 2018 1.00 (0/9) Ctrl-Ergo Ctrl-Ergo-SMTComp-2018_default unknown ❌ 1200.10000 4767.49000
CVC4 master-2018-06-10-b19c840-competition-default_default unknown ❌ 1200.01000 1199.73000
MathSAT mathsat-5.5.2-linux-x86_64-Main_default unknown ❌ 1200.02000 1199.80000
OpenSMT opensmt2_default unknown ❌ 1200.02000 1200.00000
SMTInterpol SMTInterpol-2.5-19-g0d39cdee_default unknown ❌ 1200.07000 1430.50000
SMT-RAT SMTRAT-Rat-final_default unknown ❌ 1200.01000 1199.91000
SMTRAT-MCSAT-final_default unknown ❌ 1200.03000 1200.02000
veriT veriT_default unknown ❌ 1200.01000 1199.87000
Yices2 Yices 2.6.0_default unknown ❌ 1200.02000 1199.86000
Z3 z3-4.7.1_default unknown ❌ 1200.03000 1200.01000
SMT-COMP 2019 1.00 (0/8) Ctrl-Ergo Ctrl-Ergo-2019-wrapped-sq_default unknown ❌ 2400.07000 9533.61000
CVC4 CVC4-2019-06-03-d350fe1-wrapped-sq_default unknown ❌ 2400.12000 2399.41000
CVC4-SymBreak_03_06_2019-wrapped-sq_default unknown ❌ 2400.08000 2399.48000
master-2018-06-10-b19c840-competition-default_default unknown ❌ 2400.07000 2399.39000
OpenSMT OpenSMT-wrapped-sq_default unknown ❌ 2400.01000 2399.64000
Par4 Par4-wrapped-sq_default unknown ❌ 2400.15000 9495.24000
SMTInterpol smtinterpol-2.5-514-wrapped-sq_default unknown ❌ 2400.02000 2443.19000
veriT veriT-wrapped-sq_default unknown ❌ 2400.02000 2400.08000
Yices2 Yices 2.6.2-wrapped-sq_default unknown ❌ 2400.06000 2400.07000
Z3 z3-4.8.4-d6df51951f4c-wrapped-sq_default unknown ❌ 2400.02000 2399.63000
SMT-COMP 2020 1.00 (0/8) CVC4 CVC4-sq-final_default unknown ❌ 1200.04000 1199.77000
MathSAT MathSAT5_default.sh unknown ❌ 1200.07000 1199.99000
OpenSMT OpenSMT_default unknown ❌ 1200.02000 1199.94000
Par4 Par4-wrapped-sq_default unknown ❌ 1200.07000 4749.47000
SMTInterpol smtinterpol-2.5-679-gacfde87a_default unknown ❌ 1200.02000 1235.66000
veriT veriT_default unknown ❌ 1200.10000 1200.00000
Yices2 Yices 2.6.2 bug fix_default unknown ❌ 1200.06000 1199.87000
Z3 z3-4.8.8_default unknown ❌ 1200.10000 1200.08000
SMT-COMP 2021 1.00 (0/6) MathSAT mathsat-5.6.6_default unknown ❌ 1200.08000 1199.94000
mc2 mc2 2021-06-07_default.sh unknown ❌ 127.14500 127.13700
Par4 Par4-wrapped-sq_default unknown ❌ 1200.16000 4737.93000
SMTInterpol smtinterpol-2.5-823-g881e8631_default unknown ❌ 1200.03000 1242.43000
veriT veriT_default unknown ❌ 1200.09000 1200.04000
Z3 z3-4.8.11_default unknown ❌ 1200.02000 1199.78000
SMT-COMP 2023 1.00 (0/5) cvc5 cvc5-default-2023-05-16-ea045f305_sq unknown ❌ 1200.02000 1199.56000
OpenSMT OpenSMT a78dcf01_default unknown ❌ 1200.02000 1199.92000
SMTInterpol smtinterpol-2.5-1272-g2d6d356c_default unknown ❌ 1200.11000 1254.72000
Yaga Yaga_SMT-COMP-2023_presubmition_default unknown ❌ 1200.02000 1199.73000
Yices2 Yices 2 for SMTCOMP 2023_default unknown ❌ 1200.10000 1199.85000
Yices 2.6.2 for SMTCOMP 2021_default unknown ❌ 1200.12000 1200.01000
Yices 2.6.2 for SMTCOMP 2021_default unknown ❌ 1200.08000 1199.99000
SMT-COMP 2024 1.00 (0/5) cvc5 cvc5 unknown ❌ 1201.72884 1201.02606
OpenSMT OpenSMT unknown ❌ 1201.25013 1200.42060
SMTInterpol SMTInterpol unknown ❌ 1201.72333 1284.32633
Yices2 Yices2 unknown ❌ 1201.21324 1201.07070
Z3alpha Z3-alpha unknown ❌ 1201.72219 1200.91844
SMT-COMP 2025 1.00 (0/6) cvc5 cvc5 unknown ❌ 1201.78943 1200.98099
OpenSMT OpenSMT unknown ❌ 1201.25036 1200.97328
SMTInterpol SMTInterpol unknown ❌ 1201.58781 1289.70527
Yices2 Yices2 unknown ❌ 1201.24554 1201.02010
Z3alpha Z3-alpha unknown ❌ 1201.00487 4802.22640
Z3 Z3-alpha-base unknown ❌ 1201.28894 1201.07285