Benchmark

non-incremental/QF_LRA/2017-Heizmann-UltimateInvariantSynthesis/_standard_running.i_4_2_2.bpl_7.smt2

Generated by a component of the Ultimate program analysis framework [1] 
that implements a constraint-based synthesis of invariants [2].

This SMT script belongs to a set of SMT scripts that was generated by 
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].

This script might _not_ contain all SMT commands that are used by 
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.

2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)


[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant 
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results - 
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
Benchmark
Size300250
Compressed Size6902
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2017-07-23
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK
check-sat calls1
Query 1
Status unsat
Inferred Status unsat
Size 300242
Compressed Size6889
Max. Term Depth8
Asserts 132
Declared Functions0
Declared Constants128
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or243 and214 =1092 +4544
-1780 *7990 <214 <=214
>214 >=103

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2017 1.00 (0/8) CVC4 CVC4-smtcomp2017-main default unknown ❌ 600.01700 599.52000
MathSAT mathsat-5.4.1-linux-x86_64-Main default unknown ❌ 600.10300 600.05100
OpenSMT opensmt2-2017-06-04 default unknown ❌ 600.01200 599.97300
SMTInterpol SMTInterpol default unknown ❌ 600.05400 711.17000
SMT-RAT SMTRAT-comp2017_2 default unknown ❌ 600.02700 600.03300
veriT veriT-2017-06-17 default unknown ❌ 600.00900 599.91500
Yices2 Yices2-Main default unknown ❌ 600.01900 600.02300
Z3 z3-4.5.0 default unknown ❌ 600.02600 599.97300
SMT-COMP 2018 0.89 (1/9) Ctrl-Ergo Ctrl-Ergo-SMTComp-2018_default unknown ❌ 1200.07000 4765.83000
CVC4 master-2018-06-10-b19c840-competition-default_default unknown ❌ 1200.01000 1199.59000
MathSAT mathsat-5.5.2-linux-x86_64-Main_default unknown ❌ 1200.09000 1199.99000
OpenSMT opensmt2_default unknown ❌ 1200.09000 1200.10000
SMTInterpol SMTInterpol-2.5-19-g0d39cdee_default unknown ❌ 1200.09000 1427.32000
SMT-RAT SMTRAT-Rat-final_default unknown ❌ 1200.02000 1199.91000
SMTRAT-MCSAT-final_default unknown ❌ 1200.03000 1199.98000
veriT veriT_default unsat ✅ 859.67300 859.69700
Yices2 Yices 2.6.0_default unknown ❌ 1200.02000 1199.91000
Z3 z3-4.7.1_default unknown ❌ 1200.03000 1199.94000
SMT-COMP 2023 0.60 (2/5) cvc5 cvc5-default-2023-05-16-ea045f305_sq unknown ❌ 1200.03000 1198.98000
OpenSMT OpenSMT a78dcf01_default unsat ✅ 589.32700 589.32700
SMTInterpol smtinterpol-2.5-1272-g2d6d356c_default unknown ❌ 1200.02000 1234.63000
Yaga Yaga_SMT-COMP-2023_presubmition_default unsat ✅ 3.74000 3.72329
Yices2 Yices 2 for SMTCOMP 2023_default unknown ❌ 1200.07000 1200.06000
Yices 2.6.2 for SMTCOMP 2021_default unknown ❌ 1200.05000 1200.06000
Yices 2.6.2 for SMTCOMP 2021_default unknown ❌ 1200.07000 1200.07000
SMT-COMP 2024 0.40 (3/5) cvc5 cvc5 unsat ✅ 925.71623 925.56222
OpenSMT OpenSMT unsat ✅ 759.90686 759.41971
SMTInterpol SMTInterpol unknown ❌ 1201.75373 1269.69662
Yices2 Yices2 unknown ❌ 1201.23926 1201.12874
Z3alpha Z3-alpha unsat ✅ 3.46321 3.35995
SMT-COMP 2025 0.50 (3/6) cvc5 cvc5 unsat ✅ 728.28017 728.06048
OpenSMT OpenSMT unsat ✅ 324.33192 324.17607
SMTInterpol SMTInterpol unknown ❌ 1201.58719 1442.46794
Yices2 Yices2 unknown ❌ 1201.25033 1200.93810
Z3alpha Z3-alpha unsat ✅ 10.23395 39.66850
Z3 Z3-alpha-base unknown ❌ 1201.25960 1200.93574