Benchmark
non-incremental/QF_LRA/2017-Heizmann-UltimateInvariantSynthesis/_standard_two_index_04.i_3_2_2.bpl_11.smt2
Generated by a component of the Ultimate program analysis framework [1]
that implements a constraint-based synthesis of invariants [2].
This SMT script belongs to a set of SMT scripts that was generated by
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].
This script might _not_ contain all SMT commands that are used by
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.
2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)
[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results -
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
| Benchmark |
|---|
| Size | 215774 |
| Compressed Size | 5483 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | — |
| check-sat calls | 1 |
| Status | unsat |
| Inferred Status | unsat |
| Size | 215766 |
| Compressed Size | 5434 |
| Max. Term Depth | 8 |
| Asserts | 167 |
| Declared Functions | 0 |
| Declared Constants | 154 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
or | 236 |
and | 208 |
= | 768 |
+ | 3664 |
- | 2624 |
* | 6752 |
< | 208 |
<= | 208 |
> | 208 |
>= | 139 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
0.88 (1/8) |
CVC4 |
CVC4-smtcomp2017-main default |
unsat ✅
|
541.44400
|
541.12900
|
| |
MathSAT |
mathsat-5.4.1-linux-x86_64-Main default |
unknown ❌
|
600.02800
|
600.03200
|
| |
OpenSMT |
opensmt2-2017-06-04 default |
unknown ❌
|
600.04400
|
600.04800
|
| |
SMTInterpol |
SMTInterpol default |
unknown ❌
|
600.03500
|
708.69000
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.01600
|
600.03800
|
| |
veriT |
veriT-2017-06-17 default |
unknown ❌
|
600.01100
|
599.97300
|
| |
Yices2 |
Yices2-Main default |
unknown ❌
|
600.04600
|
600.04200
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.01600
|
599.96200
|
|
SMT-COMP 2018
|
0.56 (4/9) |
Ctrl-Ergo |
Ctrl-Ergo-SMTComp-2018_default |
unknown ❌
|
1200.06000
|
4776.41000
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unsat ✅
|
512.06700
|
511.70200
|
| |
MathSAT |
mathsat-5.5.2-linux-x86_64-Main_default |
unknown ❌
|
1200.08000
|
1200.04000
|
| |
OpenSMT |
opensmt2_default |
unknown ❌
|
1200.04000
|
1200.07000
|
| |
SMTInterpol |
SMTInterpol-2.5-19-g0d39cdee_default |
unsat ✅
|
842.55500
|
996.11000
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.05000
|
1200.06000
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.02000
|
1199.93000
|
| |
veriT |
veriT_default |
unsat ✅
|
657.44800
|
657.44500
|
| |
Yices2 |
Yices 2.6.0_default |
unsat ✅
|
833.45700
|
833.42300
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.04000
|
1199.93000
|
|
SMT-COMP 2021
|
0.67 (2/6) |
MathSAT |
mathsat-5.6.6_default |
unknown ❌
|
1200.05000
|
1200.02000
|
| |
mc2 |
mc2 2021-06-07_default.sh |
unknown ❌
|
164.24000
|
164.22600
|
| |
Par4 |
Par4-wrapped-sq_default |
unsat ✅
|
550.82700
|
2173.20000
|
| |
SMTInterpol |
smtinterpol-2.5-823-g881e8631_default |
unknown ❌
|
1200.04000
|
1237.85000
|
| |
veriT |
veriT_default |
unsat ✅
|
770.75100
|
770.72800
|
| |
Z3 |
z3-4.8.11_default |
unknown ❌
|
1200.04000
|
1200.01000
|
|
SMT-COMP 2022
|
0.60 (2/5) |
cvc5 |
cvc5-default-2022-07-02-b15e116-wrapped_sq |
unsat ✅
|
536.41100
|
535.80800
|
| |
MathSAT |
MathSAT-5.6.8_default |
unknown ❌
|
1200.03000
|
1199.94000
|
| |
veriT |
veriT_default |
unsat ✅
|
851.30300
|
851.24000
|
| |
Yices2 |
Yices 2.6.2 for SMTCOMP 2021_default |
unknown ❌
|
1200.05000
|
1200.00000
|
| |
|
Yices 2.6.2 for SMTCOMP 2021_default |
unknown ❌
|
1200.03000
|
1199.99000
|
| |
Z3 |
z3-4.8.17_default |
unknown ❌
|
1200.06000
|
1200.06000
|
|
SMT-COMP 2023
|
0.40 (3/5) |
cvc5 |
cvc5-default-2023-05-16-ea045f305_sq |
unsat ✅
|
730.31200
|
730.05400
|
| |
OpenSMT |
OpenSMT a78dcf01_default |
unsat ✅
|
281.67800
|
281.66100
|
| |
SMTInterpol |
smtinterpol-2.5-1272-g2d6d356c_default |
unknown ❌
|
1200.08000
|
1295.58000
|
| |
Yaga |
Yaga_SMT-COMP-2023_presubmition_default |
unknown ❌
|
1200.02000
|
1199.96000
|
| |
Yices2 |
Yices 2 for SMTCOMP 2023_default |
unsat ✅
|
1096.70000
|
1096.65000
|
| |
|
Yices 2.6.2 for SMTCOMP 2021_default |
unsat ✅
|
998.30600
|
998.21100
|
| |
|
Yices 2.6.2 for SMTCOMP 2021_default |
unsat ✅
|
998.14100
|
998.11400
|
|
SMT-COMP 2024
|
0.20 (4/5) |
cvc5 |
cvc5 |
unsat ✅
|
196.40960
|
196.25213
|
| |
OpenSMT |
OpenSMT |
unsat ✅
|
209.05176
|
208.86871
|
| |
SMTInterpol |
SMTInterpol |
unsat ✅
|
1025.40948
|
1155.52706
|
| |
Yices2 |
Yices2 |
unsat ✅
|
723.01037
|
722.71898
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.72490
|
1201.04275
|