Benchmark

non-incremental/QF_LRA/2017-Heizmann-UltimateInvariantSynthesis/_gr2006.c.i_4_4_3.bpl_7.smt2

Generated by a component of the Ultimate program analysis framework [1] 
that implements a constraint-based synthesis of invariants [2].

This SMT script belongs to a set of SMT scripts that was generated by 
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].

This script might _not_ contain all SMT commands that are used by 
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.

2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)


[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant 
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results - 
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
Benchmark
Size254859
Compressed Size6627
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2017-07-23
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK
check-sat calls1
Query 1
Status unsat
Inferred Status unsat
Size 254851
Compressed Size6609
Max. Term Depth8
Asserts 138
Declared Functions0
Declared Constants141
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or183 and162 =1070 +4430
-2022 *7920 <162 <=162
>162 >=117

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2017 0.12 (7/8) CVC4 CVC4-smtcomp2017-main default unsat ✅ 5.67947 5.67802
MathSAT mathsat-5.4.1-linux-x86_64-Main default unsat ✅ 48.36090 48.35890
OpenSMT opensmt2-2017-06-04 default unsat ✅ 12.79010 12.78720
SMTInterpol SMTInterpol default unsat ✅ 19.53230 31.08390
SMT-RAT SMTRAT-comp2017_2 default unknown ❌ 600.10200 600.13100
veriT veriT-2017-06-17 default unsat ✅ 11.75440 11.75110
Yices2 Yices2-Main default unsat ✅ 31.53300 31.52810
Z3 z3-4.5.0 default unsat ✅ 18.02950 18.02670
SMT-COMP 2018 0.11 (8/9) Ctrl-Ergo Ctrl-Ergo-SMTComp-2018_default unsat ✅ 331.11400 1316.41000
CVC4 master-2018-06-10-b19c840-competition-default_default unsat ✅ 7.91313 7.91298
MathSAT mathsat-5.5.2-linux-x86_64-Main_default unsat ✅ 40.06460 40.06250
OpenSMT opensmt2_default unsat ✅ 15.48740 15.48680
SMTInterpol SMTInterpol-2.5-19-g0d39cdee_default unsat ✅ 18.71830 28.89290
SMT-RAT SMTRAT-Rat-final_default unknown ❌ 1200.02000 1199.95000
SMTRAT-MCSAT-final_default unknown ❌ 1200.04000 1200.07000
veriT veriT_default unsat ✅ 6.21611 6.21608
Yices2 Yices 2.6.0_default unsat ✅ 27.46960 27.46800
Z3 z3-4.7.1_default unsat ✅ 5.74158 5.74173
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq unsat ✅ 11.68820 11.68960
OpenSMT OpenSMT a78dcf01_default unsat ✅ 1.70937 1.70929
SMTInterpol smtinterpol-2.5-1272-g2d6d356c_default unsat ✅ 33.27740 50.05290
Yaga Yaga_SMT-COMP-2023_presubmition_default unsat ✅ 22.57730 22.47370
Yices2 Yices 2 for SMTCOMP 2023_default unsat ✅ 12.89460 12.89320
Yices 2.6.2 for SMTCOMP 2021_default unsat ✅ 11.97340 11.97210
Yices 2.6.2 for SMTCOMP 2021_default unsat ✅ 11.95940 11.95800
SMT-COMP 2024 cvc5 cvc5 unsat ✅ 3.75378 3.65429
OpenSMT OpenSMT unsat ✅ 1.43889 1.33912
SMTInterpol SMTInterpol unsat ✅ 18.58838 36.31304
Yices2 Yices2 unsat ✅ 13.58148 13.48069
Z3alpha Z3-alpha unsat ✅ 7.25575 7.15172
SMT-COMP 2025 cvc5 cvc5 unsat ✅ 4.36800 4.23978
OpenSMT OpenSMT unsat ✅ 1.41655 1.29965
SMTInterpol SMTInterpol unsat ✅ 38.09895 52.32095
Yices2 Yices2 unsat ✅ 6.99168 6.86586
Z3alpha Z3-alpha unsat ✅ 13.42448 52.39293
Z3 Z3-alpha-base unsat ✅ 10.30671 10.18742