Benchmark

non-incremental/QF_NRA/20170501-Heizmann-UltimateInvariantSynthesis/linear_search.i_6_24_3.bpl_3.smt2

Generated by a component of the Ultimate program analysis framework [1] 
that implements a constraint-based synthesis of invariants [2].

This SMT script belongs to a set of SMT scripts that was generated by 
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].

This script might _not_ contain all SMT commands that are used by 
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.

2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)


[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant 
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results - 
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
Benchmark
Size165335
Compressed Size11412
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2017-07-23
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 165327
Compressed Size11724
Max. Term Depth7
Asserts 3
Declared Functions0
Declared Constants1137
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or25 and3 =672 +1075
-1506 *2432 <25 <=25
>25 >=1120

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2017 1.00 (0/5) CVC4 CVC4-smtcomp2017-main default unknown ❌ 600.01700 598.02400
SMT-RAT SMTRAT-comp2017_2 default unknown ❌ 600.10400 600.10000
veriT veriT+raSAT+Redlog default unknown ❌ 600.11300 631.77000
Yices2 Yices2-Main default unknown ❌ 600.01700 599.95600
Z3 z3-4.5.0 default unknown ❌ 600.02100 599.75000
SMT-COMP 2018 1.00 (0/5) CVC4 master-2018-06-10-b19c840-competition-default_default unknown ❌ 1200.02000 1197.58000
SMT-RAT SMTRAT-Rat-final_default unknown ❌ 1200.01000 1199.97000
SMTRAT-MCSAT-final_default unknown ❌ 1200.01000 1199.89000
veriT veriT+raSAT+Reduce_default unknown ❌ 1200.02000 1199.95000
Yices2 Yices 2.6.0_default unknown ❌ 1200.11000 1200.06000
Z3 z3-4.7.1_default unknown ❌ 1200.02000 1200.01000
SMT-COMP 2021 0.90 (1/10) MathSAT mathsat-5.6.6_default sat ✅ 2.45394 2.45400
Par4 Par4-wrapped-sq_default unknown ❌ 1200.06000 3596.53000
SMT-RAT smtrat-MCSAT_default unknown ❌ 1200.01000 1199.98000
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.11000 1200.27000
Z3 z3-4.8.11_default unknown ❌ 1200.02000 1199.95000
SMT-COMP 2022 0.78 (2/9) cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq unknown ❌ 1200.06000 1199.94000
MathSAT MathSAT-5.6.8_default sat ✅ 6.33362 6.33369
NRA-LS NRA-LS-FINAL_default unknown ❌ 1170.08000 1169.87000
Par4 Par4-wrapped-sq_default unknown ❌ 1200.06000 3592.62000
SMT-RAT SMT-RAT-MCSAT_default unknown ❌ 1200.02000 1200.00000
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.11000 1200.17000
Yices2 Yices 2.6.2 for SMTCOMP 2021_default unknown ❌ 1200.03000 1199.93000
Z3 z3-4.8.17_default unknown ❌ 1200.12000 1200.03000
Z3++ z3++0715_default sat ✅ 0.68195 0.68088
SMT-COMP 2024 1.00 (0/5) cvc5 cvc5 unknown ❌ 1201.71581 1200.60177
SMTInterpol SMTInterpol unknown ❌ 1.16911 3.06019
SMT-RAT SMT-RAT unknown ❌ 1201.71187 1200.95265
Yices2 Yices2 unknown ❌ 1201.23821 1201.09534
Z3alpha Z3-alpha unknown ❌ 1201.71191 1200.68203