Benchmark
non-incremental/QF_NRA/20170501-Heizmann-UltimateInvariantSynthesis/simple1.i_3_6_2.bpl_9.smt2
Generated by a component of the Ultimate program analysis framework [1]
that implements a constraint-based synthesis of invariants [2].
This SMT script belongs to a set of SMT scripts that was generated by
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].
This script might _not_ contain all SMT commands that are used by
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.
2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)
[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results -
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
| Benchmark |
| Size | 18224 |
| Compressed Size | 2157 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unknown |
| Inferred Status | unsat |
| Size | 18216 |
| Compressed Size | 2175 |
| Max. Term Depth | 7 |
| Asserts | 3 |
| Declared Functions | 0 |
| Declared Constants | 108 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
or | 14 |
and | 3 |
= | 30 |
+ | 174 |
- | 110 |
* | 316 |
< | 14 |
<= | 14 |
> | 14 |
>= | 100 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
1.00 (0/5) |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.01300
|
597.55000
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.04500
|
600.00800
|
| |
veriT |
veriT+raSAT+Redlog default |
unknown ❌
|
600.02100
|
675.21000
|
| |
Yices2 |
Yices2-Main default |
unknown ❌
|
600.07400
|
600.09400
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.10400
|
599.86000
|
|
SMT-COMP 2018
|
1.00 (0/5) |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.02000
|
1196.61000
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.10000
|
1200.02000
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.02000
|
1199.94000
|
| |
veriT |
veriT+raSAT+Reduce_default |
unknown ❌
|
1200.02000
|
1199.99000
|
| |
Yices2 |
Yices 2.6.0_default |
unknown ❌
|
1200.01000
|
1199.90000
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.10000
|
1199.83000
|
|
SMT-COMP 2019
|
1.00 (0/7) |
CVC4 |
CVC4-2019-06-03-d350fe1-wrapped-sq_default |
unknown ❌
|
2400.12000
|
2395.73000
|
| |
|
CVC4-SymBreak_03_06_2019-wrapped-sq_default |
unknown ❌
|
2400.10000
|
2393.96000
|
| |
MathSAT |
mathsat-20190601-wrapped-sq_default |
unknown ❌
|
2400.11000
|
2399.95000
|
| |
|
mathsat-na-20190601-wrapped-sq_default |
unknown ❌
|
2400.02000
|
2400.01000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
2400.10000
|
7198.05000
|
| |
SMT-RAT |
SMTRAT-5-wrapped-sq_default |
unknown ❌
|
2400.06000
|
2399.68000
|
| |
|
SMTRAT-MCSAT-4-wrapped-sq_default |
unknown ❌
|
2400.05000
|
2399.87000
|
| |
veriT |
veriT+raSAT+Redlog-wrapped-sq_default |
unknown ❌
|
2400.02000
|
2399.88000
|
| |
Yices2 |
Yices 2.6.2-wrapped-sq_default |
unknown ❌
|
2400.11000
|
2399.88000
|
| |
Z3 |
z3-4.8.4-d6df51951f4c-wrapped-sq_default |
unknown ❌
|
2400.02000
|
2399.85000
|
| |
|
z3-4.7.1_default |
unknown ❌
|
2400.03000
|
2399.74000
|
|
SMT-COMP 2023
|
0.86 (1/7) |
cvc5 |
cvc5-default-2023-05-16-ea045f305_sq |
unknown ❌
|
1200.11000
|
1198.13000
|
| |
NRA-LS |
cvc5-NRA-LS-sq_default |
unknown ❌
|
1170.03000
|
1170.03000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.06000
|
3598.19000
|
| |
SMT-RAT |
SMT-RAT-MCSAT_default |
unknown ❌
|
1200.01000
|
1199.88000
|
| |
Yices2 |
Yices 2 for SMTCOMP 2023_default |
unsat ✅
|
66.90550
|
66.90140
|
| |
Z3alpha |
z3alpha_default |
unknown ❌
|
1200.02000
|
1199.91000
|
| |
Z3++ |
z3++0715_default |
unknown ❌
|
1200.07000
|
1199.98000
|
| |
|
Z3++_sq_0526_default |
unknown ❌
|
1200.06000
|
1199.90000
|
|
SMT-COMP 2024
|
0.60 (2/5) |
cvc5 |
cvc5 |
unknown ❌
|
1201.71614
|
1200.39997
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.57294
|
0.97519
|
| |
SMT-RAT |
SMT-RAT |
unsat ✅
|
506.82687
|
506.69943
|
| |
Yices2 |
Yices2 |
unsat ✅
|
47.66959
|
47.56716
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.74944
|
1201.04993
|
|
SMT-COMP 2025
|
0.83 (1/6) |
cvc5 |
cvc5 |
unknown ❌
|
1201.78759
|
1201.07384
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.58139
|
0.86371
|
| |
SMT-RAT |
SMT-RAT |
unknown ❌
|
1201.29251
|
1201.05525
|
| |
Yices2 |
Yices2 |
unknown ❌
|
1201.27435
|
1201.01913
|
| |
Z3alpha |
Z3-alpha |
unsat ✅
|
974.79530
|
3702.65553
|
| |
Z3 |
Z3-alpha-base |
unknown ❌
|
1201.25582
|
1200.94885
|
| |
|
z3siri-base |
unknown ❌
|
1201.24447
|
1201.04094
|