Benchmark
non-incremental/QF_NRA/20170501-Heizmann-UltimateInvariantSynthesis/up.i_4_4_5.bpl_3.smt2
Generated by a component of the Ultimate program analysis framework [1]
that implements a constraint-based synthesis of invariants [2].
This SMT script belongs to a set of SMT scripts that was generated by
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].
This script might _not_ contain all SMT commands that are used by
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.
2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)
[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results -
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
| Benchmark |
|---|
| Size | 40508 |
| Compressed Size | 3579 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unknown |
| Inferred Status | sat |
| Size | 40500 |
| Compressed Size | 3591 |
| Max. Term Depth | 7 |
| Asserts | 5 |
| Declared Functions | 0 |
| Declared Constants | 212 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
or | 17 |
and | 5 |
= | 108 |
+ | 386 |
- | 299 |
* | 719 |
< | 17 |
<= | 17 |
> | 17 |
>= | 194 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
1.00 (0/5) |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.02100
|
598.69600
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.01700
|
600.02000
|
| |
veriT |
veriT+raSAT+Redlog default |
unknown ❌
|
600.02000
|
833.69000
|
| |
Yices2 |
Yices2-Main default |
unknown ❌
|
600.02000
|
599.89000
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.01600
|
599.71200
|
|
SMT-COMP 2018
|
1.00 (0/5) |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.10000
|
1198.04000
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.10000
|
1199.98000
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.08000
|
1200.04000
|
| |
veriT |
veriT+raSAT+Reduce_default |
unknown ❌
|
1200.11000
|
1199.98000
|
| |
Yices2 |
Yices 2.6.0_default |
unknown ❌
|
1200.05000
|
1200.07000
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.02000
|
1200.02000
|
|
SMT-COMP 2020
|
1.00 (0/7) |
CVC4 |
CVC4-sq-final_default |
unknown ❌
|
1200.03000
|
1195.23000
|
| |
MathSAT |
MathSAT5_default.sh |
unknown ❌
|
1200.10000
|
1199.91000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.08000
|
3596.78000
|
| |
SMT-RAT |
smtrat-CDCAC_default |
unknown ❌
|
1200.01000
|
1199.89000
|
| |
|
smtrat-MCSAT_default |
unknown ❌
|
1200.03000
|
1199.91000
|
| |
veriT |
veriT+raSAT+Redlog_default |
unknown ❌
|
1200.03000
|
1200.01000
|
| |
Yices2 |
Yices 2.6.2 bug fix_default |
unknown ❌
|
1200.12000
|
1199.99000
|
| |
Z3 |
z3-4.8.8_default |
unknown ❌
|
1200.08000
|
1199.98000
|
|
SMT-COMP 2022
|
1.00 (0/9) |
cvc5 |
cvc5-default-2022-07-02-b15e116-wrapped_sq |
unknown ❌
|
1200.03000
|
1199.86000
|
| |
MathSAT |
MathSAT-5.6.8_default |
unknown ❌
|
1200.01000
|
1199.86000
|
| |
NRA-LS |
NRA-LS-FINAL_default |
unknown ❌
|
1173.97000
|
1170.30000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.05000
|
3593.75000
|
| |
SMT-RAT |
SMT-RAT-MCSAT_default |
unknown ❌
|
1200.03000
|
1199.97000
|
| |
veriT |
veriT+raSAT+Redlog_default |
unknown ❌
|
1200.11000
|
1200.01000
|
| |
Yices2 |
Yices 2.6.2 for SMTCOMP 2021_default |
unknown ❌
|
1200.02000
|
1199.93000
|
| |
Z3 |
z3-4.8.17_default |
unknown ❌
|
1200.02000
|
1199.83000
|
| |
Z3++ |
z3++0715_default |
unknown ❌
|
1200.11000
|
1200.11000
|
|
SMT-COMP 2025
|
0.50 (3/6) |
cvc5 |
cvc5 |
unknown ❌
|
1201.78400
|
1201.04575
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.63274
|
1.12346
|
| |
SMT-RAT |
SMT-RAT |
unknown ❌
|
1201.31590
|
1201.01590
|
| |
Yices2 |
Yices2 |
sat ✅
|
1.13808
|
1.01656
|
| |
Z3alpha |
Z3-alpha |
sat ✅
|
91.02333
|
361.87456
|
| |
Z3 |
Z3-alpha-base |
sat ✅
|
32.46292
|
32.33759
|
| |
|
z3siri-base |
sat ✅
|
32.45361
|
32.33262
|