Benchmark
non-incremental/QF_NRA/20170501-Heizmann-UltimateInvariantSynthesis/count_by_k.i_3_3_2.bpl_5.smt2
Generated by a component of the Ultimate program analysis framework [1]
that implements a constraint-based synthesis of invariants [2].
This SMT script belongs to a set of SMT scripts that was generated by
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].
This script might _not_ contain all SMT commands that are used by
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.
2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)
[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results -
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
| Benchmark |
|---|
| Size | 9806 |
| Compressed Size | 1559 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unknown |
| Inferred Status | None |
| Size | 9798 |
| Compressed Size | 1516 |
| Max. Term Depth | 7 |
| Asserts | 3 |
| Declared Functions | 0 |
| Declared Constants | 53 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
or | 7 |
and | 3 |
= | 19 |
+ | 96 |
- | 48 |
* | 171 |
< | 7 |
<= | 7 |
> | 7 |
>= | 44 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
1.00 (0/5) |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.11200
|
599.63000
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.06600
|
599.99300
|
| |
veriT |
veriT+raSAT+Redlog default |
unknown ❌
|
600.02300
|
605.99400
|
| |
Yices2 |
Yices2-Main default |
unknown ❌
|
600.01700
|
599.96000
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.01500
|
599.90400
|
|
SMT-COMP 2018
|
1.00 (0/5) |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.01000
|
1198.78000
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.02000
|
1199.91000
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.01000
|
1199.84000
|
| |
veriT |
veriT+raSAT+Reduce_default |
unknown ❌
|
1200.04000
|
1199.99000
|
| |
Yices2 |
Yices 2.6.0_default |
unknown ❌
|
1200.01000
|
1199.94000
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.01000
|
1199.93000
|
|
SMT-COMP 2020
|
1.00 (0/7) |
CVC4 |
CVC4-sq-final_default |
unknown ❌
|
1200.01000
|
1197.97000
|
| |
MathSAT |
MathSAT5_default.sh |
unknown ❌
|
1200.01000
|
1199.74000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.14000
|
3598.57000
|
| |
SMT-RAT |
smtrat-CDCAC_default |
unknown ❌
|
1200.03000
|
1199.99000
|
| |
|
smtrat-MCSAT_default |
unknown ❌
|
1200.04000
|
1200.00000
|
| |
veriT |
veriT+raSAT+Redlog_default |
unknown ❌
|
1200.01000
|
1199.98000
|
| |
Yices2 |
Yices 2.6.2 bug fix_default |
unknown ❌
|
1200.02000
|
1199.85000
|
| |
Z3 |
z3-4.8.8_default |
unknown ❌
|
1200.03000
|
1199.77000
|
|
SMT-COMP 2021
|
1.00 (0/10) |
MathSAT |
mathsat-5.6.6_default |
unknown ❌
|
1200.02000
|
1199.84000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.06000
|
3596.91000
|
| |
SMT-RAT |
smtrat-MCSAT_default |
unknown ❌
|
1200.09000
|
1200.03000
|
| |
veriT |
veriT+raSAT+Redlog_default |
unknown ❌
|
1200.03000
|
1199.90000
|
| |
Z3 |
z3-4.8.11_default |
unknown ❌
|
1200.05000
|
1199.50000
|
|
SMT-COMP 2024
|
1.00 (0/5) |
cvc5 |
cvc5 |
unknown ❌
|
1201.71551
|
1200.72634
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.49152
|
0.61256
|
| |
SMT-RAT |
SMT-RAT |
unknown ❌
|
1201.72026
|
1201.06432
|
| |
Yices2 |
Yices2 |
unknown ❌
|
1201.23913
|
1200.87012
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.72694
|
1201.09092
|
|
SMT-COMP 2025
|
1.00 (0/6) |
cvc5 |
cvc5 |
unknown ❌
|
1201.77242
|
1201.07626
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.49385
|
0.59888
|
| |
SMT-RAT |
SMT-RAT |
unknown ❌
|
1201.30957
|
1201.01549
|
| |
Yices2 |
Yices2 |
unknown ❌
|
1201.26293
|
1200.93444
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.64855
|
4517.43858
|
| |
Z3 |
Z3-alpha-base |
unknown ❌
|
1201.31653
|
1201.01390
|
| |
|
z3siri-base |
unknown ❌
|
1201.32690
|
1201.03793
|