Benchmark

non-incremental/QF_NRA/20170501-Heizmann-UltimateInvariantSynthesis/nested9.i_5_6_6.bpl_3.smt2

Generated by a component of the Ultimate program analysis framework [1] 
that implements a constraint-based synthesis of invariants [2].

This SMT script belongs to a set of SMT scripts that was generated by 
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].

This script might _not_ contain all SMT commands that are used by 
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.

2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)


[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant 
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results - 
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
Benchmark
Size64725
Compressed Size5106
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2017-07-23
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status None
Size 64717
Compressed Size5117
Max. Term Depth7
Asserts 6
Declared Functions0
Declared Constants282
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or23 and6 =210 +732
-461 *1311 <23 <=23
>23 >=254

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2017 1.00 (0/5) CVC4 CVC4-smtcomp2017-main default unknown ❌ 600.01300 598.35100
SMT-RAT SMTRAT-comp2017_2 default unknown ❌ 600.01700 599.97200
veriT veriT+raSAT+Redlog default unknown ❌ 600.02800 836.07000
Yices2 Yices2-Main default unknown ❌ 600.01100 599.93100
Z3 z3-4.5.0 default unknown ❌ 600.10500 599.97000
SMT-COMP 2018 1.00 (0/5) CVC4 master-2018-06-10-b19c840-competition-default_default unknown ❌ 1200.02000 1196.15000
SMT-RAT SMTRAT-Rat-final_default unknown ❌ 1200.11000 1200.06000
SMTRAT-MCSAT-final_default unknown ❌ 1200.01000 1199.87000
veriT veriT+raSAT+Reduce_default unknown ❌ 1200.07000 1200.12000
Yices2 Yices 2.6.0_default unknown ❌ 1200.02000 1199.96000
Z3 z3-4.7.1_default unknown ❌ 1200.05000 1199.85000
SMT-COMP 2019 1.00 (0/7) CVC4 CVC4-2019-06-03-d350fe1-wrapped-sq_default unknown ❌ 2400.03000 2393.77000
CVC4-SymBreak_03_06_2019-wrapped-sq_default unknown ❌ 2400.01000 2392.51000
MathSAT mathsat-20190601-wrapped-sq_default unknown ❌ 2400.02000 2399.72000
mathsat-na-20190601-wrapped-sq_default unknown ❌ 2400.02000 2399.82000
Par4 Par4-wrapped-sq_default unknown ❌ 2400.17000 7194.33000
SMT-RAT SMTRAT-5-wrapped-sq_default unknown ❌ 2400.04000 2399.75000
SMTRAT-MCSAT-4-wrapped-sq_default unknown ❌ 2400.08000 2400.14000
veriT veriT+raSAT+Redlog-wrapped-sq_default unknown ❌ 2400.10000 2399.84000
Yices2 Yices 2.6.2-wrapped-sq_default unknown ❌ 2400.11000 2399.76000
Z3 z3-4.8.4-d6df51951f4c-wrapped-sq_default unknown ❌ 2400.02000 2399.89000
z3-4.7.1_default unknown ❌ 2400.08000 2399.69000
SMT-COMP 2020 1.00 (0/7) CVC4 CVC4-sq-final_default unknown ❌ 1200.03000 1196.10000
MathSAT MathSAT5_default.sh unknown ❌ 1200.11000 1199.68000
Par4 Par4-wrapped-sq_default unknown ❌ 1200.11000 3597.79000
SMT-RAT smtrat-CDCAC_default unknown ❌ 1200.03000 1199.89000
smtrat-MCSAT_default unknown ❌ 1200.02000 1199.97000
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.10000 1200.02000
Yices2 Yices 2.6.2 bug fix_default unknown ❌ 1200.02000 1199.93000
Z3 z3-4.8.8_default unknown ❌ 1200.03000 1199.89000
SMT-COMP 2022 1.00 (0/9) cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq unknown ❌ 1200.11000 1199.61000
MathSAT MathSAT-5.6.8_default unknown ❌ 1200.03000 1199.96000
NRA-LS NRA-LS-FINAL_default unknown ❌ 1170.09000 1169.88000
Par4 Par4-wrapped-sq_default unknown ❌ 1200.12000 3437.54000
SMT-RAT SMT-RAT-MCSAT_default unknown ❌ 1200.04000 1199.89000
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.03000 1199.99000
Yices2 Yices 2.6.2 for SMTCOMP 2021_default unknown ❌ 1200.02000 1199.77000
Z3 z3-4.8.17_default unknown ❌ 1200.12000 1199.99000
Z3++ z3++0715_default unknown ❌ 1200.10000 1199.69000
SMT-COMP 2023 1.00 (0/7) cvc5 cvc5-default-2023-05-16-ea045f305_sq unknown ❌ 1200.03000 1199.12000
NRA-LS cvc5-NRA-LS-sq_default unknown ❌ 1171.13000 1170.05000
Par4 Par4-wrapped-sq_default unknown ❌ 1200.08000 3596.53000
SMT-RAT SMT-RAT-MCSAT_default unknown ❌ 1200.02000 1199.81000
Yices2 Yices 2 for SMTCOMP 2023_default unknown ❌ 1200.02000 1199.91000
Z3alpha z3alpha_default unknown ❌ 1200.12000 1199.94000
Z3++ z3++0715_default unknown ❌ 1200.02000 1199.86000
Z3++_sq_0526_default unknown ❌ 1200.02000 1199.82000
SMT-COMP 2024 1.00 (0/5) cvc5 cvc5 unknown ❌ 1201.71861 1200.99322
SMTInterpol SMTInterpol unknown ❌ 0.79620 1.73675
SMT-RAT SMT-RAT unknown ❌ 1201.73092 1201.15182
Yices2 Yices2 unknown ❌ 1201.25490 1201.03573
Z3alpha Z3-alpha unknown ❌ 1201.72058 1201.05700