Benchmark
non-incremental/QF_NRA/20170501-Heizmann-UltimateInvariantSynthesis/ddlm2013.i_3_6_2.bpl_3.smt2
Generated by a component of the Ultimate program analysis framework [1]
that implements a constraint-based synthesis of invariants [2].
This SMT script belongs to a set of SMT scripts that was generated by
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].
This script might _not_ contain all SMT commands that are used by
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.
2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)
[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results -
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
| Benchmark |
|---|
| Size | 34454 |
| Compressed Size | 3264 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unknown |
| Inferred Status | sat |
| Size | 34446 |
| Compressed Size | 3275 |
| Max. Term Depth | 7 |
| Asserts | 3 |
| Declared Functions | 0 |
| Declared Constants | 186 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
or | 12 |
and | 3 |
= | 108 |
+ | 316 |
- | 232 |
* | 616 |
< | 12 |
<= | 12 |
> | 12 |
>= | 172 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
1.00 (0/5) |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.01300
|
598.96500
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.08300
|
600.04100
|
| |
veriT |
veriT+raSAT+Redlog default |
unknown ❌
|
600.02400
|
629.18000
|
| |
Yices2 |
Yices2-Main default |
unknown ❌
|
600.10900
|
599.99000
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.01600
|
599.87000
|
|
SMT-COMP 2018
|
1.00 (0/5) |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.01000
|
1197.82000
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.02000
|
1199.84000
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.01000
|
1199.84000
|
| |
veriT |
veriT+raSAT+Reduce_default |
unknown ❌
|
1200.01000
|
1199.96000
|
| |
Yices2 |
Yices 2.6.0_default |
unknown ❌
|
1200.01000
|
1199.91000
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.01000
|
1199.90000
|
|
SMT-COMP 2021
|
0.90 (1/10) |
MathSAT |
mathsat-5.6.6_default |
unknown ❌
|
1200.02000
|
1199.87000
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
604.30000
|
1809.58000
|
| |
SMT-RAT |
smtrat-MCSAT_default |
unknown ❌
|
1200.01000
|
1199.87000
|
| |
veriT |
veriT+raSAT+Redlog_default |
unknown ❌
|
1200.01000
|
1199.97000
|
| |
Z3 |
z3-4.8.11_default |
unknown ❌
|
1200.02000
|
1199.95000
|
|
SMT-COMP 2023
|
0.71 (2/7) |
cvc5 |
cvc5-default-2023-05-16-ea045f305_sq |
unknown ❌
|
1200.12000
|
1181.98000
|
| |
NRA-LS |
cvc5-NRA-LS-sq_default |
unknown ❌
|
1172.36000
|
1170.18000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.07000
|
3597.83000
|
| |
SMT-RAT |
SMT-RAT-MCSAT_default |
sat ✅
|
68.76320
|
68.74030
|
| |
Yices2 |
Yices 2 for SMTCOMP 2023_default |
unknown ❌
|
1200.02000
|
1199.80000
|
| |
Z3alpha |
z3alpha_default |
unknown ❌
|
1200.02000
|
1199.96000
|
| |
Z3++ |
z3++0715_default |
sat ✅
|
16.35080
|
16.34920
|
| |
|
Z3++_sq_0526_default |
sat ✅
|
16.60510
|
16.60220
|
|
SMT-COMP 2024
|
0.80 (1/5) |
cvc5 |
cvc5 |
unknown ❌
|
1201.71799
|
1201.00090
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.66519
|
1.24912
|
| |
SMT-RAT |
SMT-RAT |
sat ✅
|
6.75709
|
6.65743
|
| |
Yices2 |
Yices2 |
unknown ❌
|
1201.23990
|
1200.70577
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.74250
|
1200.68975
|
|
SMT-COMP 2025
|
0.83 (1/6) |
cvc5 |
cvc5 |
unknown ❌
|
1201.79267
|
1201.09334
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.60765
|
1.06005
|
| |
SMT-RAT |
SMT-RAT |
unknown ❌
|
1201.26503
|
1201.05812
|
| |
Yices2 |
Yices2 |
sat ✅
|
0.48303
|
0.35360
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.00496
|
4801.18687
|
| |
Z3 |
Z3-alpha-base |
unknown ❌
|
1201.25086
|
1200.95091
|
| |
|
z3siri-base |
unknown ❌
|
1201.31078
|
1201.05657
|