Benchmark
non-incremental/QF_NRA/20170501-Heizmann-UltimateInvariantSynthesis/standard_two_index_04.i_3_2_2.bpl_5.smt2
Generated by a component of the Ultimate program analysis framework [1]
that implements a constraint-based synthesis of invariants [2].
This SMT script belongs to a set of SMT scripts that was generated by
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].
This script might _not_ contain all SMT commands that are used by
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.
2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)
[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results -
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
| Benchmark |
|---|
| Size | 13811 |
| Compressed Size | 1842 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unknown |
| Inferred Status | None |
| Size | 13803 |
| Compressed Size | 1824 |
| Max. Term Depth | 7 |
| Asserts | 3 |
| Declared Functions | 0 |
| Declared Constants | 77 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
or | 8 |
and | 3 |
= | 34 |
+ | 124 |
- | 81 |
* | 231 |
< | 8 |
<= | 8 |
> | 8 |
>= | 68 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
1.00 (0/5) |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.01300
|
599.56100
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.05900
|
599.98000
|
| |
veriT |
veriT+raSAT+Redlog default |
unknown ❌
|
600.12600
|
698.93000
|
| |
Yices2 |
Yices2-Main default |
unknown ❌
|
600.01900
|
600.01800
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.01300
|
599.94200
|
|
SMT-COMP 2018
|
1.00 (0/5) |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.02000
|
1198.53000
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.03000
|
1199.80000
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.05000
|
1200.01000
|
| |
veriT |
veriT+raSAT+Reduce_default |
unknown ❌
|
1200.01000
|
1199.84000
|
| |
Yices2 |
Yices 2.6.0_default |
unknown ❌
|
1200.08000
|
1199.96000
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.11000
|
1199.99000
|
|
SMT-COMP 2024
|
1.00 (0/5) |
cvc5 |
cvc5 |
unknown ❌
|
1201.71292
|
1200.98680
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.54150
|
0.80937
|
| |
SMT-RAT |
SMT-RAT |
unknown ❌
|
1201.71674
|
1201.07702
|
| |
Yices2 |
Yices2 |
unknown ❌
|
1201.25419
|
1200.68459
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1059.02056
|
1060.26768
|
|
SMT-COMP 2025
|
1.00 (0/6) |
cvc5 |
cvc5 |
unknown ❌
|
1201.78956
|
1201.18059
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.55155
|
0.73931
|
| |
SMT-RAT |
SMT-RAT |
unknown ❌
|
1201.29079
|
1201.06323
|
| |
Yices2 |
Yices2 |
unknown ❌
|
1201.26747
|
1201.01003
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.00579
|
4802.15879
|
| |
Z3 |
Z3-alpha-base |
unknown ❌
|
386.63628
|
388.40047
|
| |
|
z3siri-base |
unknown ❌
|
205.14305
|
206.80892
|