Benchmark

non-incremental/QF_NRA/20170501-Heizmann-UltimateInvariantSynthesis/simple4.i_3_4_2.bpl_9.smt2

Generated by a component of the Ultimate program analysis framework [1] 
that implements a constraint-based synthesis of invariants [2].

This SMT script belongs to a set of SMT scripts that was generated by 
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].

This script might _not_ contain all SMT commands that are used by 
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.

2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)


[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant 
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results - 
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
Benchmark
Size19508
Compressed Size2183
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2017-07-23
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status None
Size 19500
Compressed Size2197
Max. Term Depth7
Asserts 3
Declared Functions0
Declared Constants112
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or14 and3 =30 +178
-136 *346 <14 <=14
>14 >=104

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2017 1.00 (0/5) CVC4 CVC4-smtcomp2017-main default unknown ❌ 600.02000 599.10000
SMT-RAT SMTRAT-comp2017_2 default unknown ❌ 600.06900 599.96500
veriT veriT+raSAT+Redlog default unknown ❌ 600.02300 684.34000
Yices2 Yices2-Main default unknown ❌ 600.01000 599.97100
Z3 z3-4.5.0 default unknown ❌ 600.08500 599.87000
SMT-COMP 2018 1.00 (0/5) CVC4 master-2018-06-10-b19c840-competition-default_default unknown ❌ 1200.11000 1198.39000
SMT-RAT SMTRAT-Rat-final_default unknown ❌ 1200.09000 1199.91000
SMTRAT-MCSAT-final_default unknown ❌ 1200.03000 1199.89000
veriT veriT+raSAT+Reduce_default unknown ❌ 1200.10000 1200.10000
Yices2 Yices 2.6.0_default unknown ❌ 1200.02000 1199.86000
Z3 z3-4.7.1_default unknown ❌ 1200.02000 1199.81000
SMT-COMP 2019 1.00 (0/7) CVC4 CVC4-2019-06-03-d350fe1-wrapped-sq_default unknown ❌ 2400.02000 2395.54000
CVC4-SymBreak_03_06_2019-wrapped-sq_default unknown ❌ 2400.10000 2392.89000
MathSAT mathsat-20190601-wrapped-sq_default unknown ❌ 2400.07000 2400.05000
mathsat-na-20190601-wrapped-sq_default unknown ❌ 2400.10000 2399.68000
Par4 Par4-wrapped-sq_default unknown ❌ 2400.10000 7196.02000
SMT-RAT SMTRAT-5-wrapped-sq_default unknown ❌ 2400.04000 2400.05000
SMTRAT-MCSAT-4-wrapped-sq_default unknown ❌ 2400.06000 2399.89000
veriT veriT+raSAT+Redlog-wrapped-sq_default unknown ❌ 2400.02000 2399.70000
Yices2 Yices 2.6.2-wrapped-sq_default unknown ❌ 2400.03000 2399.75000
Z3 z3-4.8.4-d6df51951f4c-wrapped-sq_default unknown ❌ 2400.02000 2399.71000
z3-4.7.1_default unknown ❌ 2400.02000 2399.63000
SMT-COMP 2024 0.80 (1/5) cvc5 cvc5 unknown ❌ 1201.72009 1200.60661
SMTInterpol SMTInterpol unknown ❌ 0.62724 1.09505
SMT-RAT SMT-RAT unknown ❌ 1201.71256 1201.10550
Yices2 Yices2 unsat ✅ 36.22949 36.11634
Z3alpha Z3-alpha unknown ❌ 1201.71888 1201.11101