Benchmark

non-incremental/QF_NRA/20170501-Heizmann-UltimateInvariantSynthesis/jain_4.i_2_3_3.bpl_3.smt2

Generated by a component of the Ultimate program analysis framework [1] 
that implements a constraint-based synthesis of invariants [2].

This SMT script belongs to a set of SMT scripts that was generated by 
applying Ultimate to benchmarks [3] from the SV-COMP 2017 [4,5].

This script might _not_ contain all SMT commands that are used by 
Ultimate . In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.

2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)


[1] https://ultimate.informatik.uni-freiburg.de/
[2] Michael Colon, Sriram Sankaranarayanan, Henny Sipma: Linear Invariant 
Generation Using Non-linear Constraint Solving. CAV 2003: 420-432
[3] https://github.com/sosy-lab/sv-benchmarks
[4] Dirk Beyer: Software Verification with Validation of Results - 
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[5] https://sv-comp.sosy-lab.org/2017/
Benchmark
Size60052
Compressed Size4762
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2017-07-23
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status unsat
Size 60044
Compressed Size4774
Max. Term Depth7
Asserts 3
Declared Functions0
Declared Constants280
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or15 and3 =237 +571
-465 *1113 <15 <=15
>15 >=264

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2017 0.60 (2/5) CVC4 CVC4-smtcomp2017-main default unsat ✅ 131.58800 131.57200
SMT-RAT SMTRAT-comp2017_2 default unknown ❌ 600.08400 599.99500
veriT veriT+raSAT+Redlog default unknown ❌ 600.03400 837.90000
Yices2 Yices2-Main default unsat ✅ 30.24730 30.24710
Z3 z3-4.5.0 default unknown ❌ 600.02100 599.73000
SMT-COMP 2018 0.60 (2/5) CVC4 master-2018-06-10-b19c840-competition-default_default unsat ✅ 4.57031 4.56971
SMT-RAT SMTRAT-Rat-final_default unknown ❌ 1200.02000 1199.97000
SMTRAT-MCSAT-final_default unknown ❌ 1200.02000 1199.81000
veriT veriT+raSAT+Reduce_default unknown ❌ 1200.11000 1200.01000
Yices2 Yices 2.6.0_default unsat ✅ 0.89758 0.89739
Z3 z3-4.7.1_default unknown ❌ 1200.02000 1199.98000
SMT-COMP 2020 0.57 (3/7) CVC4 CVC4-sq-final_default unsat ✅ 6.87892 6.87859
MathSAT MathSAT5_default.sh unsat ✅ 212.34000 212.33900
Par4 Par4-wrapped-sq_default unsat ✅ 4.09836 12.16000
SMT-RAT smtrat-CDCAC_default unknown ❌ 1200.11000 1200.12000
smtrat-MCSAT_default unknown ❌ 1200.02000 1199.93000
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.03000 1199.92000
Yices2 Yices 2.6.2 bug fix_default unknown ❌ 1200.01000 1200.00000
Z3 z3-4.8.8_default unknown ❌ 1200.03000 1199.82000
SMT-COMP 2021 0.80 (2/10) MathSAT mathsat-5.6.6_default unsat ✅ 15.24860 15.24900
Par4 Par4-wrapped-sq_default unsat ✅ 2.74842 8.11000
SMT-RAT smtrat-MCSAT_default unknown ❌ 1200.02000 1199.83000
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.02000 1199.86000
Z3 z3-4.8.11_default unknown ❌ 1200.02000 1199.88000
SMT-COMP 2023 0.14 (6/7) cvc5 cvc5-default-2023-05-16-ea045f305_sq unsat ✅ 40.61720 40.61650
NRA-LS cvc5-NRA-LS-sq_default unsat ✅ 14.72950 14.72690
Par4 Par4-wrapped-sq_default unsat ✅ 7.24682 21.47000
SMT-RAT SMT-RAT-MCSAT_default unsat ✅ 13.46520 13.46560
Yices2 Yices 2 for SMTCOMP 2023_default unsat ✅ 2.62391 2.62402
Z3alpha z3alpha_default unknown ❌ 1200.02000 1199.86000
Z3++ z3++0715_default unsat ✅ 0.63427 0.63428
Z3++_sq_0526_default unsat ✅ 0.65663 0.65658
SMT-COMP 2024 0.40 (3/5) cvc5 cvc5 unsat ✅ 10.34868 10.24888
SMTInterpol SMTInterpol unknown ❌ 0.77641 1.68547
SMT-RAT SMT-RAT unsat ✅ 3.37187 3.27055
Yices2 Yices2 unsat ✅ 2.72747 2.62776
Z3alpha Z3-alpha unknown ❌ 1201.74525 1201.10439