Benchmark

non-incremental/QF_NRA/hycomp/ball_count_2d_plain.03.redlog_global_10.smt2

Benchmarks generated from hycomp (https://es-static.fbk.eu/tools/hycomp/). BMC instances of non-linear hybrid automata taken from: Alessandro Cimatti, Sergio Mover, Stefano Tonetta, A quantifier-free SMT encoding of non-linear hybrid automata, FMCAD 2012 and Alessandro Cimatti, Sergio Mover, Stefano Tonetta, Quantier-free encoding of invariants for Hybrid Systems, Formal Methods in System Design. This instance solves a BMC problem of depth 10 and uses the encoding obtained with quantifier elimination using redlog encoding. Contacts: Sergio Mover (mover@fbk.eu), Stefano Tonetta (tonettas@fbk.eu), Alessandro Cimatti (cimatti@fbk.eu).
Benchmark
Size115711
Compressed Size20670
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2014-07-21
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 115703
Compressed Size20673
Max. Term Depth2477
Asserts 1
Declared Functions0
Declared Constants146
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

not210 or587 and762 =228
let2474 /3 +179 -65
*316 <=192

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2017 1.00 (0/5) CVC4 CVC4-smtcomp2017-main default unknown ❌ 600.11400 597.56000
SMT-RAT SMTRAT-comp2017_2 default unknown ❌ 600.01700 600.00400
veriT veriT+raSAT+Redlog default unknown ❌ 600.10700 418.11000
Yices2 Yices2-Main default unknown ❌ 600.10300 600.02400
Z3 z3-4.5.0 default unknown ❌ 600.07900 599.88700
SMT-COMP 2018 0.80 (1/5) CVC4 master-2018-06-10-b19c840-competition-default_default unknown ❌ 1200.01000 1198.99000
SMT-RAT SMTRAT-Rat-final_default unknown ❌ 1200.07000 1200.05000
SMTRAT-MCSAT-final_default unknown ❌ 1200.04000 1200.01000
veriT veriT+raSAT+Reduce_default unknown ❌ 1200.05000 1200.08000
Yices2 Yices 2.6.0_default unknown ❌ 1200.09000 1200.05000
Z3 z3-4.7.1_default sat ✅ 35.63500 35.63310
SMT-COMP 2020 0.71 (2/7) CVC4 CVC4-sq-final_default unknown ❌ 1200.11000 1198.47000
MathSAT MathSAT5_default.sh unknown ❌ 1200.07000 1199.89000
Par4 Par4-wrapped-sq_default unknown ❌ 1200.09000 3590.77000
SMT-RAT smtrat-CDCAC_default unknown ❌ 1200.08000 1199.77000
smtrat-MCSAT_default unknown ❌ 1200.05000 1200.00000
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.02000 1199.77000
Yices2 Yices 2.6.2 bug fix_default sat ✅ 0.66214 0.66204
Z3 z3-4.8.8_default sat ✅ 961.56900 961.52400
SMT-COMP 2021 0.80 (2/10) MathSAT mathsat-5.6.6_default unknown ❌ 1200.02000 1199.74000
Par4 Par4-wrapped-sq_default sat ✅ 35.53080 106.28000
SMT-RAT smtrat-MCSAT_default unknown ❌ 1200.10000 1200.00000
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.10000 1201.03000
Z3 z3-4.8.11_default sat ✅ 210.06500 210.02100
SMT-COMP 2022 0.56 (4/9) cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq unknown ❌ 1200.02000 1199.74000
MathSAT MathSAT-5.6.8_default unknown ❌ 1200.01000 1199.87000
NRA-LS NRA-LS-FINAL_default unknown ❌ 1170.10000 1170.09000
Par4 Par4-wrapped-sq_default sat ✅ 34.71100 91.28680
SMT-RAT SMT-RAT-MCSAT_default unknown ❌ 1200.09000 1199.94000
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.02000 1201.82000
Yices2 Yices 2.6.2 for SMTCOMP 2021_default sat ✅ 0.57856 0.57844
Z3 z3-4.8.17_default sat ✅ 4.01653 4.01794
Z3++ z3++0715_default sat ✅ 6.06490 6.06447
SMT-COMP 2024 0.60 (2/5) cvc5 cvc5 unknown ❌ 1201.71918 1200.64319
SMTInterpol SMTInterpol unknown ❌ 1.02416 2.71855
SMT-RAT SMT-RAT unknown ❌ 1201.71559 1200.95635
Yices2 Yices2 sat ✅ 13.70300 13.59779
Z3alpha Z3-alpha sat ✅ 199.74075 199.62600
SMT-COMP 2025 0.50 (3/6) cvc5 cvc5 unknown ❌ 1201.78863 1200.95462
SMTInterpol SMTInterpol unknown ❌ 0.90286 2.18149
SMT-RAT SMT-RAT unknown ❌ 1201.28476 1201.06548
Yices2 Yices2 sat ✅ 0.38281 0.25870
Z3alpha Z3-alpha sat ✅ 4.68722 13.35937
Z3 Z3-alpha-base sat ✅ 1.96140 1.83482
z3siri-base sat ✅ 1.92868 1.80918