Benchmark
non-incremental/QF_NRA/hycomp/ball_count_1d_plain.03.redlog_global_8.smt2
Benchmarks generated from hycomp (https://es-static.fbk.eu/tools/hycomp/). BMC instances of non-linear hybrid automata taken from: Alessandro Cimatti, Sergio Mover, Stefano Tonetta, A quantifier-free SMT encoding of non-linear hybrid automata, FMCAD 2012 and Alessandro Cimatti, Sergio Mover, Stefano Tonetta, Quantier-free encoding of invariants for Hybrid Systems, Formal Methods in System Design. This instance solves a BMC problem of depth 8 and uses the encoding obtained with quantifier elimination using redlog encoding. Contacts: Sergio Mover (mover@fbk.eu), Stefano Tonetta (tonettas@fbk.eu), Alessandro Cimatti (cimatti@fbk.eu).
| Benchmark |
|---|
| Size | 70110 |
| Compressed Size | 12855 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2014-07-21 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | sat |
| Size | 70102 |
| Compressed Size | 12873 |
| Max. Term Depth | 1496 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 100 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 142 |
or | 385 |
and | 487 |
= | 132 |
let | 1493 |
/ | 2 |
+ | 93 |
- | 59 |
* | 163 |
<= | 91 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
0.80 (1/5) |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.01400
|
598.33700
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.11100
|
600.04000
|
| |
veriT |
veriT+raSAT+Redlog default |
unknown ❌
|
600.11400
|
630.22000
|
| |
Yices2 |
Yices2-Main default |
sat ✅
|
4.03777
|
4.03653
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.01700
|
599.94300
|
|
SMT-COMP 2018
|
0.60 (2/5) |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.08000
|
1198.29000
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.02000
|
1199.87000
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.06000
|
1200.06000
|
| |
veriT |
veriT+raSAT+Reduce_default |
unknown ❌
|
1200.02000
|
1199.93000
|
| |
Yices2 |
Yices 2.6.0_default |
sat ✅
|
0.08399
|
0.08392
|
| |
Z3 |
z3-4.7.1_default |
sat ✅
|
0.13524
|
0.13524
|
|
SMT-COMP 2019
|
0.57 (3/7) |
CVC4 |
CVC4-2019-06-03-d350fe1-wrapped-sq_default |
unknown ❌
|
2400.10000
|
2397.00000
|
| |
|
CVC4-SymBreak_03_06_2019-wrapped-sq_default |
unknown ❌
|
2400.02000
|
2393.98000
|
| |
MathSAT |
mathsat-20190601-wrapped-sq_default |
unknown ❌
|
2400.03000
|
2400.03000
|
| |
|
mathsat-na-20190601-wrapped-sq_default |
unknown ❌
|
2400.03000
|
2399.95000
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
0.34123
|
0.00569
|
| |
SMT-RAT |
SMTRAT-5-wrapped-sq_default |
unknown ❌
|
2400.05000
|
2399.76000
|
| |
|
SMTRAT-MCSAT-4-wrapped-sq_default |
unknown ❌
|
2400.05000
|
2399.86000
|
| |
veriT |
veriT+raSAT+Redlog-wrapped-sq_default |
unknown ❌
|
2400.02000
|
2399.90000
|
| |
Yices2 |
Yices 2.6.2-wrapped-sq_default |
sat ✅
|
0.39646
|
0.39644
|
| |
Z3 |
z3-4.8.4-d6df51951f4c-wrapped-sq_default |
sat ✅
|
0.70144
|
0.70146
|
| |
|
z3-4.7.1_default |
sat ✅
|
0.74477
|
0.74465
|
|
SMT-COMP 2020
|
0.57 (3/7) |
CVC4 |
CVC4-sq-final_default |
unknown ❌
|
1200.01000
|
1197.72000
|
| |
MathSAT |
MathSAT5_default.sh |
unknown ❌
|
1200.02000
|
1199.90000
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
0.15770
|
0.00686
|
| |
SMT-RAT |
smtrat-CDCAC_default |
unknown ❌
|
1200.08000
|
1200.02000
|
| |
|
smtrat-MCSAT_default |
unknown ❌
|
1200.06000
|
1199.74000
|
| |
veriT |
veriT+raSAT+Redlog_default |
unknown ❌
|
1200.12000
|
1204.02000
|
| |
Yices2 |
Yices 2.6.2 bug fix_default |
sat ✅
|
0.12436
|
0.12435
|
| |
Z3 |
z3-4.8.8_default |
sat ✅
|
9.77654
|
9.77640
|
|
SMT-COMP 2021
|
0.70 (3/10) |
MathSAT |
mathsat-5.6.6_default |
unknown ❌
|
1200.08000
|
1199.85000
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
0.07134
|
0.00628
|
| |
SMT-RAT |
smtrat-MCSAT_default |
sat ✅
|
1.04770
|
1.04743
|
| |
veriT |
veriT+raSAT+Redlog_default |
unknown ❌
|
1200.04000
|
1199.94000
|
| |
Z3 |
z3-4.8.11_default |
sat ✅
|
0.06878
|
0.06885
|
|
SMT-COMP 2024
|
0.20 (4/5) |
cvc5 |
cvc5 |
sat ✅
|
0.39228
|
0.29250
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.80133
|
1.88839
|
| |
SMT-RAT |
SMT-RAT |
sat ✅
|
1.44391
|
1.34377
|
| |
Yices2 |
Yices2 |
sat ✅
|
0.31592
|
0.21603
|
| |
Z3alpha |
Z3-alpha |
sat ✅
|
6.42027
|
6.32038
|
|
SMT-COMP 2025
|
0.17 (5/6) |
cvc5 |
cvc5 |
sat ✅
|
1.21060
|
1.09087
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.76376
|
1.59635
|
| |
SMT-RAT |
SMT-RAT |
sat ✅
|
0.87405
|
0.75589
|
| |
Yices2 |
Yices2 |
sat ✅
|
0.27936
|
0.16445
|
| |
Z3alpha |
Z3-alpha |
sat ✅
|
0.65644
|
0.63872
|
| |
Z3 |
Z3-alpha-base |
sat ✅
|
51.25880
|
51.12953
|
| |
|
z3siri-base |
sat ✅
|
50.44490
|
50.30450
|