Benchmark
non-incremental/QF_NRA/hycomp/etcs_braking_2.01.redlog_global_6.smt2
Benchmarks generated from hycomp (https://es-static.fbk.eu/tools/hycomp/). BMC instances of non-linear hybrid automata taken from: Alessandro Cimatti, Sergio Mover, Stefano Tonetta, A quantifier-free SMT encoding of non-linear hybrid automata, FMCAD 2012 and Alessandro Cimatti, Sergio Mover, Stefano Tonetta, Quantier-free encoding of invariants for Hybrid Systems, Formal Methods in System Design. This instance solves a BMC problem of depth 6 and uses the encoding obtained with quantifier elimination using redlog encoding. Contacts: Sergio Mover (mover@fbk.eu), Stefano Tonetta (tonettas@fbk.eu), Alessandro Cimatti (cimatti@fbk.eu).
| Benchmark |
| Size | 175251 |
| Compressed Size | 31783 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2014-07-21 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unsat |
| Inferred Status | unsat |
| Size | 175243 |
| Compressed Size | 31345 |
| Max. Term Depth | 3600 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 152 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 301 |
or | 664 |
and | 938 |
= | 308 |
let | 3597 |
/ | 68 |
+ | 349 |
- | 235 |
* | 566 |
<= | 471 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2014
|
0.25 (3/4) |
CVC3 |
CVC3 default |
unsat ✅
|
1.33415
|
1.32580
|
| |
CVC4 |
CVC4 f7118b2 default |
unsat ✅
|
0.17475
|
0.15698
|
| |
raSAT |
raSAT-main-track-final default.sh |
unknown ❌
|
0.01837
|
0.00500
|
| |
Z3 |
Z3-4.3.2.a054b099c1d6-x64-debian-6.0.6-SMT-COMP-2014 default |
unsat ✅
|
6.56439
|
6.55800
|
|
SMT-COMP 2015
|
0.17 (5/6) |
CVC3 |
CVC3 default |
unsat ✅
|
1.63964
|
1.63975
|
| |
CVC4 |
CVC4-master-2015-06-15-9b32405-main default |
unsat ✅
|
0.17422
|
0.17197
|
| |
|
CVC4-experimental-2015-06-15-ff5745a-main default |
unsat ✅
|
0.17472
|
0.17197
|
| |
raSAT |
raSAT default.sh |
unsat ✅
|
2400.01000
|
2400.75000
|
| |
SMT-RAT |
SMT-RAT-final default |
unknown ❌
|
2400.01000
|
2400.53000
|
| |
Yices2 |
Yices2-NL default |
unsat ✅
|
0.44472
|
0.44393
|
| |
Z3 |
z3 4.4.0 default |
unsat ✅
|
18.33920
|
18.34820
|
|
SMT-COMP 2016
|
0.20 (4/5) |
CVC4 |
CVC4-master-2016-05-27-cfef263-main default |
unsat ✅
|
0.16693
|
0.16734
|
| |
raSAT |
raSAT 0.3 default.sh |
unsat ✅
|
2400.03000
|
2401.56000
|
| |
|
raSAT 0.4 exp - final default.py |
unknown ❌
|
2400.10000
|
4815.41000
|
| |
SMT-RAT |
SMT-RAT default |
unknown ❌
|
2400.06000
|
2401.66000
|
| |
Yices2 |
Yices-2.4.2 default |
unsat ✅
|
0.24157
|
0.24169
|
| |
Z3 |
z3-4.4.1 default |
unsat ✅
|
18.50200
|
18.51300
|
|
SMT-COMP 2017
|
|
CVC4 |
CVC4-smtcomp2017-main default |
unsat ✅
|
0.18485
|
0.18442
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unsat ✅
|
335.39200
|
335.32700
|
| |
veriT |
veriT+raSAT+Redlog default |
unsat ✅
|
0.03924
|
0.03873
|
| |
Yices2 |
Yices2-Main default |
unsat ✅
|
0.22235
|
0.22158
|
| |
Z3 |
z3-4.5.0 default |
unsat ✅
|
18.54670
|
18.54480
|
|
SMT-COMP 2018
|
|
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unsat ✅
|
0.19563
|
0.19581
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unsat ✅
|
254.00900
|
253.96600
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.04000
|
1199.92000
|
| |
veriT |
veriT+raSAT+Reduce_default |
unsat ✅
|
0.10538
|
0.10530
|
| |
Yices2 |
Yices 2.6.0_default |
unsat ✅
|
0.06463
|
0.06459
|
| |
Z3 |
z3-4.7.1_default |
unsat ✅
|
18.68160
|
18.68230
|
|
SMT-COMP 2019
|
|
CVC4 |
CVC4-2019-06-03-d350fe1-wrapped-sq_default |
unsat ✅
|
0.20027
|
0.20062
|
| |
|
CVC4-SymBreak_03_06_2019-wrapped-sq_default |
unsat ✅
|
0.94422
|
0.94623
|
| |
MathSAT |
mathsat-20190601-wrapped-sq_default |
unsat ✅
|
0.07403
|
0.07404
|
| |
|
mathsat-na-20190601-wrapped-sq_default |
unsat ✅
|
0.07532
|
0.07530
|
| |
Par4 |
Par4-wrapped-sq_default |
unsat ✅
|
0.14494
|
0.00557
|
| |
SMT-RAT |
SMTRAT-5-wrapped-sq_default |
unknown ❌
|
2400.03000
|
2399.13000
|
| |
|
SMTRAT-MCSAT-4-wrapped-sq_default |
unsat ✅
|
5.71389
|
5.71374
|
| |
veriT |
veriT+raSAT+Redlog-wrapped-sq_default |
unsat ✅
|
0.04419
|
0.04418
|
| |
Yices2 |
Yices 2.6.2-wrapped-sq_default |
unsat ✅
|
0.14560
|
0.14559
|
| |
Z3 |
z3-4.8.4-d6df51951f4c-wrapped-sq_default |
unsat ✅
|
15.33490
|
15.33400
|
| |
|
z3-4.7.1_default |
unsat ✅
|
15.50220
|
15.50220
|
|
SMT-COMP 2024
|
|
cvc5 |
cvc5 |
unsat ✅
|
0.31404
|
0.21342
|
| |
SMTInterpol |
SMTInterpol |
unsat ✅
|
1.37655
|
3.88828
|
| |
SMT-RAT |
SMT-RAT |
unsat ✅
|
3.52523
|
3.42542
|
| |
Yices2 |
Yices2 |
unsat ✅
|
0.27871
|
0.17891
|
| |
Z3alpha |
Z3-alpha |
unsat ✅
|
2.74258
|
2.64223
|
|
SMT-COMP 2025
|
|
cvc5 |
cvc5 |
unsat ✅
|
0.33924
|
0.21941
|
| |
SMTInterpol |
SMTInterpol |
unsat ✅
|
1.15546
|
2.98135
|
| |
SMT-RAT |
SMT-RAT |
unsat ✅
|
3.37301
|
3.25214
|
| |
Yices2 |
Yices2 |
unsat ✅
|
0.35780
|
0.22602
|
| |
Z3alpha |
Z3-alpha |
unsat ✅
|
0.64447
|
0.61295
|
| |
Z3 |
Z3-alpha-base |
unsat ✅
|
50.43496
|
50.30228
|
| |
|
z3siri-base |
unsat ✅
|
50.39537
|
50.27017
|