Benchmark
non-incremental/QF_NRA/hycomp/etcs_braking_2.01.redlog_global_3.smt2
Benchmarks generated from hycomp (https://es-static.fbk.eu/tools/hycomp/). BMC instances of non-linear hybrid automata taken from: Alessandro Cimatti, Sergio Mover, Stefano Tonetta, A quantifier-free SMT encoding of non-linear hybrid automata, FMCAD 2012 and Alessandro Cimatti, Sergio Mover, Stefano Tonetta, Quantier-free encoding of invariants for Hybrid Systems, Formal Methods in System Design. This instance solves a BMC problem of depth 3 and uses the encoding obtained with quantifier elimination using redlog encoding. Contacts: Sergio Mover (mover@fbk.eu), Stefano Tonetta (tonettas@fbk.eu), Alessandro Cimatti (cimatti@fbk.eu).
| Benchmark |
|---|
| Size | 94770 |
| Compressed Size | 17267 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2014-07-21 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unsat |
| Inferred Status | unsat |
| Size | 94762 |
| Compressed Size | 17284 |
| Max. Term Depth | 1959 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 86 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 166 |
or | 358 |
and | 503 |
= | 164 |
let | 1956 |
/ | 38 |
+ | 187 |
- | 124 |
* | 314 |
<= | 264 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2014
|
0.25 (3/4) |
CVC3 |
CVC3 default |
unsat ✅
|
1.03735
|
1.02384
|
| |
CVC4 |
CVC4 f7118b2 default |
unsat ✅
|
0.09707
|
0.08699
|
| |
raSAT |
raSAT-main-track-final default.sh |
unknown ❌
|
0.01756
|
0.00500
|
| |
Z3 |
Z3-4.3.2.a054b099c1d6-x64-debian-6.0.6-SMT-COMP-2014 default |
unsat ✅
|
0.33989
|
0.33195
|
|
SMT-COMP 2015
|
0.17 (5/6) |
CVC3 |
CVC3 default |
unsat ✅
|
0.97986
|
0.97985
|
| |
CVC4 |
CVC4-master-2015-06-15-9b32405-main default |
unsat ✅
|
0.09297
|
0.09098
|
| |
|
CVC4-experimental-2015-06-15-ff5745a-main default |
unsat ✅
|
0.09385
|
0.09198
|
| |
raSAT |
raSAT default.sh |
unsat ✅
|
2400.01000
|
2400.74000
|
| |
SMT-RAT |
SMT-RAT-final default |
unknown ❌
|
2400.01000
|
2400.80000
|
| |
Yices2 |
Yices2-NL default |
unsat ✅
|
0.63268
|
0.63190
|
| |
Z3 |
z3 4.4.0 default |
unsat ✅
|
0.27215
|
0.27196
|
|
SMT-COMP 2016
|
0.20 (4/5) |
CVC4 |
CVC4-master-2016-05-27-cfef263-main default |
unsat ✅
|
0.09361
|
0.09374
|
| |
raSAT |
raSAT 0.3 default.sh |
unsat ✅
|
2400.10000
|
2401.45000
|
| |
|
raSAT 0.4 exp - final default.py |
unknown ❌
|
2400.03000
|
4815.87000
|
| |
SMT-RAT |
SMT-RAT default |
unknown ❌
|
2400.03000
|
2401.64000
|
| |
Yices2 |
Yices-2.4.2 default |
unsat ✅
|
0.16773
|
0.16725
|
| |
Z3 |
z3-4.4.1 default |
unsat ✅
|
0.13931
|
0.14034
|
|
SMT-COMP 2017
|
0.20 (4/5) |
CVC4 |
CVC4-smtcomp2017-main default |
unsat ✅
|
0.10458
|
0.10301
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.02000
|
599.97000
|
| |
veriT |
veriT+raSAT+Redlog default |
unsat ✅
|
0.02868
|
0.02825
|
| |
Yices2 |
Yices2-Main default |
unsat ✅
|
0.91390
|
0.91319
|
| |
Z3 |
z3-4.5.0 default |
unsat ✅
|
0.71032
|
0.70960
|
|
SMT-COMP 2018
|
|
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unsat ✅
|
0.10717
|
0.10735
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unsat ✅
|
3.94832
|
3.94806
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.03000
|
1199.92000
|
| |
veriT |
veriT+raSAT+Reduce_default |
unsat ✅
|
0.02742
|
0.02732
|
| |
Yices2 |
Yices 2.6.0_default |
unsat ✅
|
0.47129
|
0.47121
|
| |
Z3 |
z3-4.7.1_default |
unsat ✅
|
1.81860
|
1.81844
|
|
SMT-COMP 2020
|
|
CVC4 |
CVC4-sq-final_default |
unsat ✅
|
0.14929
|
0.14955
|
| |
MathSAT |
MathSAT5_default.sh |
unsat ✅
|
0.04765
|
0.04761
|
| |
Par4 |
Par4-wrapped-sq_default |
unsat ✅
|
0.12250
|
0.00741
|
| |
SMT-RAT |
smtrat-CDCAC_default |
unsat ✅
|
13.83390
|
13.83220
|
| |
|
smtrat-MCSAT_default |
unsat ✅
|
1.60199
|
1.60192
|
| |
veriT |
veriT+raSAT+Redlog_default |
unsat ✅
|
0.02567
|
0.02561
|
| |
Yices2 |
Yices 2.6.2 bug fix_default |
unsat ✅
|
0.38901
|
0.38891
|
| |
Z3 |
z3-4.8.8_default |
unsat ✅
|
0.20422
|
0.20422
|
|
SMT-COMP 2024
|
|
cvc5 |
cvc5 |
unsat ✅
|
0.25507
|
0.15548
|
| |
SMTInterpol |
SMTInterpol |
unsat ✅
|
1.03896
|
2.67540
|
| |
SMT-RAT |
SMT-RAT |
unsat ✅
|
1.79380
|
1.69395
|
| |
Yices2 |
Yices2 |
unsat ✅
|
0.27574
|
0.17579
|
| |
Z3alpha |
Z3-alpha |
unsat ✅
|
6.80991
|
6.70744
|
|
SMT-COMP 2025
|
|
cvc5 |
cvc5 |
unsat ✅
|
0.30018
|
0.18292
|
| |
SMTInterpol |
SMTInterpol |
unsat ✅
|
0.93129
|
2.27064
|
| |
SMT-RAT |
SMT-RAT |
unsat ✅
|
1.37248
|
1.24290
|
| |
Yices2 |
Yices2 |
unsat ✅
|
0.29482
|
0.17534
|
| |
Z3alpha |
Z3-alpha |
unsat ✅
|
0.62166
|
0.54553
|
| |
Z3 |
Z3-alpha-base |
unsat ✅
|
3.41370
|
3.28787
|
| |
|
z3siri-base |
unsat ✅
|
3.15857
|
3.03959
|