Benchmark
non-incremental/QF_NRA/hycomp/ball_count_1d_plain.02.redlog_global_0.smt2
Benchmarks generated from hycomp (https://es-static.fbk.eu/tools/hycomp/). BMC instances of non-linear hybrid automata taken from: Alessandro Cimatti, Sergio Mover, Stefano Tonetta, A quantifier-free SMT encoding of non-linear hybrid automata, FMCAD 2012 and Alessandro Cimatti, Sergio Mover, Stefano Tonetta, Quantier-free encoding of invariants for Hybrid Systems, Formal Methods in System Design. This instance solves a BMC problem of depth 0 and uses the encoding obtained with quantifier elimination using redlog encoding. Contacts: Sergio Mover (mover@fbk.eu), Stefano Tonetta (tonettas@fbk.eu), Alessandro Cimatti (cimatti@fbk.eu).
| Benchmark |
|---|
| Size | 4462 |
| Compressed Size | 1239 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2014-07-21 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unsat |
| Inferred Status | unsat |
| Size | 4454 |
| Compressed Size | 1232 |
| Max. Term Depth | 83 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 12 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 14 |
or | 15 |
and | 22 |
= | 4 |
let | 80 |
/ | 2 |
+ | 4 |
- | 2 |
* | 10 |
<= | 11 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2014
|
0.25 (3/4) |
CVC3 |
CVC3 default |
unsat ✅
|
0.01767
|
0.00900
|
| |
CVC4 |
CVC4 f7118b2 default |
unsat ✅
|
0.01647
|
0.00700
|
| |
raSAT |
raSAT-main-track-final default.sh |
unknown ❌
|
0.01598
|
0.00400
|
| |
Z3 |
Z3-4.3.2.a054b099c1d6-x64-debian-6.0.6-SMT-COMP-2014 default |
unsat ✅
|
0.01396
|
0.00600
|
|
SMT-COMP 2015
|
|
CVC3 |
CVC3 default |
unsat ✅
|
0.01002
|
0.00900
|
| |
CVC4 |
CVC4-master-2015-06-15-9b32405-main default |
unsat ✅
|
0.01021
|
0.00800
|
| |
|
CVC4-experimental-2015-06-15-ff5745a-main default |
unsat ✅
|
0.01022
|
0.00800
|
| |
raSAT |
raSAT default.sh |
unsat ✅
|
0.01062
|
0.00800
|
| |
SMT-RAT |
SMT-RAT-final default |
unsat ✅
|
0.00852
|
0.00800
|
| |
Yices2 |
Yices2-NL default |
unsat ✅
|
0.00816
|
0.00200
|
| |
Z3 |
z3 4.4.0 default |
unsat ✅
|
0.03028
|
0.02999
|
|
SMT-COMP 2016
|
|
CVC4 |
CVC4-master-2016-05-27-cfef263-main default |
unsat ✅
|
0.01282
|
0.01215
|
| |
raSAT |
raSAT 0.3 default.sh |
unsat ✅
|
0.01215
|
0.00797
|
| |
|
raSAT 0.4 exp - final default.py |
unsat ✅
|
0.04328
|
0.03378
|
| |
SMT-RAT |
SMT-RAT default |
unsat ✅
|
0.01281
|
0.00936
|
| |
Yices2 |
Yices-2.4.2 default |
unsat ✅
|
0.01170
|
0.00321
|
| |
Z3 |
z3-4.4.1 default |
unsat ✅
|
0.02863
|
0.02984
|
|
SMT-COMP 2017
|
|
CVC4 |
CVC4-smtcomp2017-main default |
unsat ✅
|
0.01491
|
0.01406
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unsat ✅
|
0.01108
|
0.01069
|
| |
veriT |
veriT+raSAT+Redlog default |
unsat ✅
|
0.01027
|
0.00952
|
| |
Yices2 |
Yices2-Main default |
unsat ✅
|
0.00823
|
0.00324
|
| |
Z3 |
z3-4.5.0 default |
unsat ✅
|
0.03222
|
0.03083
|
|
SMT-COMP 2018
|
|
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unsat ✅
|
0.01273
|
0.01295
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unsat ✅
|
0.00922
|
0.00915
|
| |
|
SMTRAT-MCSAT-final_default |
unsat ✅
|
0.00910
|
0.00904
|
| |
veriT |
veriT+raSAT+Reduce_default |
unsat ✅
|
0.00821
|
0.00667
|
| |
Yices2 |
Yices 2.6.0_default |
unsat ✅
|
0.00731
|
0.00555
|
| |
Z3 |
z3-4.7.1_default |
unsat ✅
|
0.03445
|
0.03438
|