Benchmark

non-incremental/QF_NRA/hycomp/ball_count_2d_plain.02.redlog_global_12.smt2

Benchmarks generated from hycomp (https://es-static.fbk.eu/tools/hycomp/). BMC instances of non-linear hybrid automata taken from: Alessandro Cimatti, Sergio Mover, Stefano Tonetta, A quantifier-free SMT encoding of non-linear hybrid automata, FMCAD 2012 and Alessandro Cimatti, Sergio Mover, Stefano Tonetta, Quantier-free encoding of invariants for Hybrid Systems, Formal Methods in System Design. This instance solves a BMC problem of depth 12 and uses the encoding obtained with quantifier elimination using redlog encoding. Contacts: Sergio Mover (mover@fbk.eu), Stefano Tonetta (tonettas@fbk.eu), Alessandro Cimatti (cimatti@fbk.eu).
Benchmark
Size136124
Compressed Size25524
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2014-07-21
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 136116
Compressed Size25188
Max. Term Depth2904
Asserts 1
Declared Functions0
Declared Constants172
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

not248 or673 and895 =272
let2901 /3 +213 -77
*374 <=226

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2017 0.80 (1/5) CVC4 CVC4-smtcomp2017-main default unknown ❌ 600.11600 598.30000
SMT-RAT SMTRAT-comp2017_2 default unknown ❌ 600.01300 599.92400
veriT veriT+raSAT+Redlog default unknown ❌ 600.08700 599.99000
Yices2 Yices2-Main default unknown ❌ 600.02100 599.96000
Z3 z3-4.5.0 default sat ✅ 55.10780 55.10250
SMT-COMP 2018 0.80 (1/5) CVC4 master-2018-06-10-b19c840-competition-default_default unknown ❌ 1200.11000 1196.79000
SMT-RAT SMTRAT-Rat-final_default unknown ❌ 1200.02000 1199.95000
SMTRAT-MCSAT-final_default unknown ❌ 1200.06000 1199.95000
veriT veriT+raSAT+Reduce_default unknown ❌ 1200.12000 1202.50000
Yices2 Yices 2.6.0_default sat ✅ 11.69160 11.68950
Z3 z3-4.7.1_default unknown ❌ 1200.08000 1199.98000
SMT-COMP 2020 0.43 (4/7) CVC4 CVC4-sq-final_default unknown ❌ 1200.11000 1198.21000
MathSAT MathSAT5_default.sh unknown ❌ 1200.05000 1199.97000
Par4 Par4-wrapped-sq_default sat ✅ 13.67770 40.73000
SMT-RAT smtrat-CDCAC_default unknown ❌ 1200.08000 1199.73000
smtrat-MCSAT_default sat ✅ 124.26500 124.25300
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.01000 1199.75000
Yices2 Yices 2.6.2 bug fix_default sat ✅ 655.05600 655.09800
Z3 z3-4.8.8_default sat ✅ 10.12710 10.12710
SMT-COMP 2022 0.56 (4/9) cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq unknown ❌ 1200.03000 1199.53000
MathSAT MathSAT-5.6.8_default unknown ❌ 1200.05000 1199.91000
NRA-LS NRA-LS-FINAL_default sat ✅ 321.28300 321.24800
Par4 Par4-wrapped-sq_default sat ✅ 48.18190 142.44000
SMT-RAT SMT-RAT-MCSAT_default sat ✅ 12.10270 12.10190
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.02000 1199.82000
Yices2 Yices 2.6.2 for SMTCOMP 2021_default unknown ❌ 1200.11000 1199.95000
Z3 z3-4.8.17_default unknown ❌ 1200.11000 1200.04000
Z3++ z3++0715_default sat ✅ 1086.83000 1086.76000
SMT-COMP 2024 0.80 (1/5) cvc5 cvc5 unknown ❌ 1201.71947 1200.82251
SMTInterpol SMTInterpol unknown ❌ 1.06505 2.78950
SMT-RAT SMT-RAT unknown ❌ 1201.71473 1201.03331
Yices2 Yices2 sat ✅ 0.46636 0.36664
Z3alpha Z3-alpha unknown ❌ 1201.71253 1200.60892
SMT-COMP 2025 0.33 (4/6) cvc5 cvc5 unknown ❌ 1201.79287 1201.03886
SMTInterpol SMTInterpol unknown ❌ 0.97856 2.37098
SMT-RAT SMT-RAT sat ✅ 3.34111 3.22295
Yices2 Yices2 sat ✅ 0.40010 0.28299
Z3alpha Z3-alpha sat ✅ 81.32587 320.00556
Z3 Z3-alpha-base sat ✅ 19.49545 19.36375
z3siri-base sat ✅ 19.39466 19.27147