Benchmark
non-incremental/QF_NRA/hycomp/ball_count_2d_plain.02.redlog_global_8.smt2
Benchmarks generated from hycomp (https://es-static.fbk.eu/tools/hycomp/). BMC instances of non-linear hybrid automata taken from: Alessandro Cimatti, Sergio Mover, Stefano Tonetta, A quantifier-free SMT encoding of non-linear hybrid automata, FMCAD 2012 and Alessandro Cimatti, Sergio Mover, Stefano Tonetta, Quantier-free encoding of invariants for Hybrid Systems, Formal Methods in System Design. This instance solves a BMC problem of depth 8 and uses the encoding obtained with quantifier elimination using redlog encoding. Contacts: Sergio Mover (mover@fbk.eu), Stefano Tonetta (tonettas@fbk.eu), Alessandro Cimatti (cimatti@fbk.eu).
| Benchmark |
| Size | 92306 |
| Compressed Size | 17160 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2014-07-21 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | sat |
| Size | 92298 |
| Compressed Size | 17169 |
| Max. Term Depth | 1984 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 120 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 172 |
or | 457 |
and | 607 |
= | 184 |
let | 1981 |
/ | 3 |
+ | 145 |
- | 53 |
* | 258 |
<= | 158 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
0.60 (2/5) |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.02100
|
599.26900
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.02900
|
599.88300
|
| |
veriT |
veriT+raSAT+Redlog default |
unknown ❌
|
600.13500
|
646.52000
|
| |
Yices2 |
Yices2-Main default |
sat ✅
|
0.24579
|
0.24495
|
| |
Z3 |
z3-4.5.0 default |
sat ✅
|
4.07580
|
4.07504
|
|
SMT-COMP 2018
|
0.60 (2/5) |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.01000
|
1192.65000
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.03000
|
1199.97000
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.03000
|
1199.95000
|
| |
veriT |
veriT+raSAT+Reduce_default |
unknown ❌
|
1200.02000
|
1200.20000
|
| |
Yices2 |
Yices 2.6.0_default |
sat ✅
|
0.12120
|
0.12115
|
| |
Z3 |
z3-4.7.1_default |
sat ✅
|
3.86310
|
7.64282
|
|
SMT-COMP 2019
|
0.43 (4/7) |
CVC4 |
CVC4-2019-06-03-d350fe1-wrapped-sq_default |
unknown ❌
|
2400.01000
|
2397.50000
|
| |
|
CVC4-SymBreak_03_06_2019-wrapped-sq_default |
unknown ❌
|
2400.10000
|
2397.83000
|
| |
MathSAT |
mathsat-20190601-wrapped-sq_default |
unknown ❌
|
2400.02000
|
2399.84000
|
| |
|
mathsat-na-20190601-wrapped-sq_default |
unknown ❌
|
2400.02000
|
2399.88000
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
0.25651
|
0.00618
|
| |
SMT-RAT |
SMTRAT-5-wrapped-sq_default |
unknown ❌
|
2400.05000
|
2399.71000
|
| |
|
SMTRAT-MCSAT-4-wrapped-sq_default |
sat ✅
|
33.56420
|
33.56220
|
| |
veriT |
veriT+raSAT+Redlog-wrapped-sq_default |
unknown ❌
|
2400.11000
|
2400.15000
|
| |
Yices2 |
Yices 2.6.2-wrapped-sq_default |
sat ✅
|
0.29429
|
0.29427
|
| |
Z3 |
z3-4.8.4-d6df51951f4c-wrapped-sq_default |
sat ✅
|
0.99775
|
0.99788
|
| |
|
z3-4.7.1_default |
sat ✅
|
1.01042
|
1.01040
|
|
SMT-COMP 2021
|
0.70 (3/10) |
MathSAT |
mathsat-5.6.6_default |
unknown ❌
|
1200.07000
|
1199.99000
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
48.05140
|
143.95000
|
| |
SMT-RAT |
smtrat-MCSAT_default |
sat ✅
|
13.25120
|
13.25010
|
| |
veriT |
veriT+raSAT+Redlog_default |
unknown ❌
|
1200.03000
|
1200.19000
|
| |
Z3 |
z3-4.8.11_default |
sat ✅
|
2.06349
|
2.06363
|
|
SMT-COMP 2022
|
0.44 (5/9) |
cvc5 |
cvc5-default-2022-07-02-b15e116-wrapped_sq |
unknown ❌
|
1200.04000
|
1199.53000
|
| |
MathSAT |
MathSAT-5.6.8_default |
unknown ❌
|
1200.02000
|
1199.90000
|
| |
NRA-LS |
NRA-LS-FINAL_default |
sat ✅
|
748.59500
|
748.59900
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
4.42284
|
13.16000
|
| |
SMT-RAT |
SMT-RAT-MCSAT_default |
unknown ❌
|
1200.07000
|
1199.88000
|
| |
veriT |
veriT+raSAT+Redlog_default |
unknown ❌
|
1200.12000
|
1201.03000
|
| |
Yices2 |
Yices 2.6.2 for SMTCOMP 2021_default |
sat ✅
|
0.06687
|
0.06682
|
| |
Z3 |
z3-4.8.17_default |
sat ✅
|
1.41543
|
1.41708
|
| |
Z3++ |
z3++0715_default |
sat ✅
|
1.63232
|
1.63249
|
|
SMT-COMP 2024
|
0.20 (4/5) |
cvc5 |
cvc5 |
sat ✅
|
0.96718
|
0.86738
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.89772
|
2.17022
|
| |
SMT-RAT |
SMT-RAT |
sat ✅
|
1.34157
|
1.24165
|
| |
Yices2 |
Yices2 |
sat ✅
|
0.29947
|
0.19941
|
| |
Z3alpha |
Z3-alpha |
sat ✅
|
4.59147
|
4.48961
|