Benchmark
non-incremental/QF_NRA/hycomp/etcs_braking_2.01.redlog_global_13.smt2
Benchmarks generated from hycomp (https://es-static.fbk.eu/tools/hycomp/). BMC instances of non-linear hybrid automata taken from: Alessandro Cimatti, Sergio Mover, Stefano Tonetta, A quantifier-free SMT encoding of non-linear hybrid automata, FMCAD 2012 and Alessandro Cimatti, Sergio Mover, Stefano Tonetta, Quantier-free encoding of invariants for Hybrid Systems, Formal Methods in System Design. This instance solves a BMC problem of depth 13 and uses the encoding obtained with quantifier elimination using redlog encoding. Contacts: Sergio Mover (mover@fbk.eu), Stefano Tonetta (tonettas@fbk.eu), Alessandro Cimatti (cimatti@fbk.eu).
| Benchmark |
| Size | 363843 |
| Compressed Size | 65036 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2014-07-21 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unknown |
| Inferred Status | None |
| Size | 363835 |
| Compressed Size | 65043 |
| Max. Term Depth | 7429 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 306 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 616 |
or | 1378 |
and | 1953 |
= | 644 |
let | 7426 |
/ | 138 |
+ | 727 |
- | 494 |
* | 1154 |
<= | 954 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
1.00 (0/5) |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.05100
|
476.21000
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.02000
|
599.99000
|
| |
veriT |
veriT+raSAT+Redlog default |
unknown ❌
|
600.01300
|
599.99000
|
| |
Yices2 |
Yices2-Main default |
unknown ❌
|
600.02300
|
599.94300
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.10700
|
599.84000
|
|
SMT-COMP 2018
|
0.80 (1/5) |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unsat ✅
|
203.07400
|
203.07100
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.04000
|
1199.97000
|
| |
|
SMTRAT-MCSAT-final_default |
unknown ❌
|
1200.04000
|
1199.92000
|
| |
veriT |
veriT+raSAT+Reduce_default |
unknown ❌
|
1200.10000
|
1199.96000
|
| |
Yices2 |
Yices 2.6.0_default |
unknown ❌
|
1200.11000
|
1199.87000
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.01000
|
1199.86000
|
|
SMT-COMP 2022
|
0.89 (1/9) |
cvc5 |
cvc5-default-2022-07-02-b15e116-wrapped_sq |
unknown ❌
|
1200.10000
|
1199.89000
|
| |
MathSAT |
MathSAT-5.6.8_default |
unsat ✅
|
31.94680
|
31.92070
|
| |
NRA-LS |
NRA-LS-FINAL_default |
unknown ❌
|
1170.16000
|
1170.07000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.08000
|
2833.17000
|
| |
SMT-RAT |
SMT-RAT-MCSAT_default |
unknown ❌
|
1200.02000
|
1199.87000
|
| |
veriT |
veriT+raSAT+Redlog_default |
unknown ❌
|
1200.02000
|
1199.91000
|
| |
Yices2 |
Yices 2.6.2 for SMTCOMP 2021_default |
unknown ❌
|
1200.03000
|
1199.86000
|
| |
Z3 |
z3-4.8.17_default |
unknown ❌
|
1200.02000
|
1199.84000
|
| |
Z3++ |
z3++0715_default |
unknown ❌
|
1200.02000
|
1199.90000
|
|
SMT-COMP 2024
|
1.00 (0/5) |
cvc5 |
cvc5 |
unknown ❌
|
1201.72098
|
1200.83593
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
2.10349
|
6.17213
|
| |
SMT-RAT |
SMT-RAT |
unknown ❌
|
1201.74350
|
1201.13511
|
| |
Yices2 |
Yices2 |
unknown ❌
|
1201.27319
|
1201.10677
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.72160
|
1201.03108
|
|
SMT-COMP 2025
|
0.83 (1/6) |
cvc5 |
cvc5 |
unsat ✅
|
817.61763
|
817.41112
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
1.52762
|
4.32112
|
| |
SMT-RAT |
SMT-RAT |
unknown ❌
|
1201.57364
|
1201.35546
|
| |
Yices2 |
Yices2 |
unknown ❌
|
1201.34921
|
1200.99187
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.00631
|
4801.91813
|
| |
Z3 |
Z3-alpha-base |
unknown ❌
|
1201.28458
|
1201.03668
|
| |
|
z3siri-base |
unknown ❌
|
1201.25148
|
1201.03964
|