Benchmark

non-incremental/QF_NRA/hycomp/ball_count_2d_hill.05.redlog_global_12.smt2

Benchmarks generated from hycomp (https://es-static.fbk.eu/tools/hycomp/). BMC instances of non-linear hybrid automata taken from: Alessandro Cimatti, Sergio Mover, Stefano Tonetta, A quantifier-free SMT encoding of non-linear hybrid automata, FMCAD 2012 and Alessandro Cimatti, Sergio Mover, Stefano Tonetta, Quantier-free encoding of invariants for Hybrid Systems, Formal Methods in System Design. This instance solves a BMC problem of depth 12 and uses the encoding obtained with quantifier elimination using redlog encoding. Contacts: Sergio Mover (mover@fbk.eu), Stefano Tonetta (tonettas@fbk.eu), Alessandro Cimatti (cimatti@fbk.eu).
Benchmark
Size246881
Compressed Size44952
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2014-07-21
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status None
Size 246873
Compressed Size44435
Max. Term Depth5374
Asserts 1
Declared Functions0
Declared Constants183
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

not258 or751 and957 =322
let5371 /2 +921 -347
*1914 <=248

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2017 1.00 (0/5) CVC4 CVC4-smtcomp2017-main default unknown ❌ 600.10500 598.55000
SMT-RAT SMTRAT-comp2017_2 default unknown ❌ 600.08500 600.02000
veriT veriT+raSAT+Redlog default unknown ❌ 600.01600 599.97100
Yices2 Yices2-Main default unknown ❌ 600.02300 600.01400
Z3 z3-4.5.0 default unknown ❌ 600.03400 599.93000
SMT-COMP 2018 1.00 (0/5) CVC4 master-2018-06-10-b19c840-competition-default_default unknown ❌ 1200.11000 1196.89000
SMT-RAT SMTRAT-Rat-final_default unknown ❌ 1200.03000 1200.00000
SMTRAT-MCSAT-final_default unknown ❌ 1200.01000 1199.79000
veriT veriT+raSAT+Reduce_default unknown ❌ 1200.01000 1199.86000
Yices2 Yices 2.6.0_default unknown ❌ 1200.01000 1199.97000
Z3 z3-4.7.1_default unknown ❌ 1200.05000 1199.90000
SMT-COMP 2020 1.00 (0/7) CVC4 CVC4-sq-final_default unknown ❌ 1200.01000 1197.79000
MathSAT MathSAT5_default.sh unknown ❌ 1200.01000 1199.68000
Par4 Par4-wrapped-sq_default unknown ❌ 1200.11000 3598.53000
SMT-RAT smtrat-CDCAC_default unknown ❌ 1200.06000 1199.93000
smtrat-MCSAT_default unknown ❌ 1200.06000 1199.97000
veriT veriT+raSAT+Redlog_default unknown ❌ 1200.06000 1200.40000
Yices2 Yices 2.6.2 bug fix_default unknown ❌ 1200.04000 1199.90000
Z3 z3-4.8.8_default unknown ❌ 1200.02000 1199.92000
SMT-COMP 2023 1.00 (0/7) cvc5 cvc5-default-2023-05-16-ea045f305_sq unknown ❌ 1200.01000 1198.57000
NRA-LS cvc5-NRA-LS-sq_default unknown ❌ 1170.12000 1169.87000
Par4 Par4-wrapped-sq_default unknown ❌ 1200.07000 3596.19000
SMT-RAT SMT-RAT-MCSAT_default unknown ❌ 1200.02000 1199.87000
Yices2 Yices 2 for SMTCOMP 2023_default unknown ❌ 1200.02000 1200.04000
Z3alpha z3alpha_default unknown ❌ 1200.02000 1199.74000
Z3++ z3++0715_default unknown ❌ 1200.02000 1199.81000
Z3++_sq_0526_default unknown ❌ 1200.09000 1200.01000
SMT-COMP 2024 1.00 (0/5) cvc5 cvc5 unknown ❌ 1201.73069 1201.03193
SMTInterpol SMTInterpol unknown ❌ 1.32372 3.68839
SMT-RAT SMT-RAT unknown ❌ 1201.74188 1201.31048
Yices2 Yices2 unknown ❌ 1201.26280 1200.68010
Z3alpha Z3-alpha unknown ❌ 1201.71736 1201.07705