Benchmark
non-incremental/QF_NRA/20220314-Uncu/Rational_Function_Proof_Calls_With_Disjunctive_Denominator_Simplifications/DDC_ProveIneq_ISSAC05_LevinRHSb.smt2
Translated to SMT-Lib by Maple SMTLIB package.
Application: CAD calls of SUMCracker-ProveInequality to prove RHS of Levin's Inequality (without any modification to the statement) in
S. Gerhold and M. Kauers, A Procedure for Proving Special Function Inequalities Involving a Discrete Parameter.
ISSAC '05: Proceedings of the 2005 international symposium on Symbolic and algebraic computationJuly 2005 Pages 156-162.
(https://dl.acm.org/doi/10.1145/1073884.1073907)
All denominators in the original CAD call got cleared by introducing disjunctions with sign conditions:
a/b == c/d --> a d==b c && b<>0 && d<>0
a/b >= c --> a >=b c && b >0 or ( a <= b c && b < 0)
| Benchmark |
|---|
| Size | 2759 |
| Compressed Size | 1071 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2022-08-10 |
| Generated By | Ali K. Uncu, Matthew England, and James H. Davenport |
| Generated On | 2022-01-06 00:00:00 |
| Generator | SUMCracker-ProveInequality function by Manuel Kauers ("https://www3.risc.jku.at/research/combinat/software/ergosum/RISC/SumCracker.html") |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | sat |
| Size | 2736 |
| Compressed Size | 1077 |
| Max. Term Depth | 11 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 3 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
or | 9 |
and | 19 |
+ | 48 |
- | 10 |
* | 98 |
< | 27 |
<= | 8 |
| |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2023
|
0.14 (6/7) |
cvc5 |
cvc5-default-2023-05-16-ea045f305_sq |
sat ✅
|
0.13130
|
0.13182
|
| |
NRA-LS |
cvc5-NRA-LS-sq_default |
unknown ❌
|
1170.05000
|
1170.01000
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
0.02491
|
0.00645
|
| |
SMT-RAT |
SMT-RAT-MCSAT_default |
sat ✅
|
0.05117
|
0.05115
|
| |
Yices2 |
Yices 2 for SMTCOMP 2023_default |
sat ✅
|
0.01846
|
0.01843
|
| |
Z3alpha |
z3alpha_default |
sat ✅
|
0.03088
|
0.03112
|
| |
Z3++ |
z3++0715_default |
sat ✅
|
0.42138
|
0.42141
|
| |
|
Z3++_sq_0526_default |
sat ✅
|
0.42134
|
0.42122
|
|
SMT-COMP 2024
|
0.20 (4/5) |
cvc5 |
cvc5 |
sat ✅
|
0.27959
|
0.18004
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.49034
|
0.56652
|
| |
SMT-RAT |
SMT-RAT |
sat ✅
|
0.23334
|
0.13386
|
| |
Yices2 |
Yices2 |
sat ✅
|
0.25432
|
0.15312
|
| |
Z3alpha |
Z3-alpha |
sat ✅
|
0.27647
|
0.17686
|
|
SMT-COMP 2025
|
0.17 (5/6) |
cvc5 |
cvc5 |
sat ✅
|
0.31450
|
0.18757
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.49932
|
0.54259
|
| |
SMT-RAT |
SMT-RAT |
sat ✅
|
0.28183
|
0.16171
|
| |
Yices2 |
Yices2 |
sat ✅
|
0.30686
|
0.17941
|
| |
Z3alpha |
Z3-alpha |
sat ✅
|
0.60662
|
0.49350
|
| |
Z3 |
Z3-alpha-base |
sat ✅
|
0.30313
|
0.18192
|
| |
|
z3siri-base |
sat ✅
|
0.30979
|
0.18012
|