Benchmark

non-incremental/QF_ANIA/20190429-UltimateAutomizerSvcomp2019/rekh_ctm_false-unreach-call.3_true-termination.c_12.smt2

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Generated by the tool Ultimate Automizer [1,2] which implements
an automata theoretic approach [3] to software verification.

This SMT script belongs to a set of SMT scripts that was generated by
applying Ultimate Automizer to benchmarks [4] from the SV-COMP 2019 [5,6].
This script might _not_ contain all SMT commands that are used by
Ultimate Automizer. In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.

2019-04-27, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)

[1] https://ultimate.informatik.uni-freiburg.de/automizer/
[2] Matthias Heizmann, Yu-Fang Chen, Daniel Dietsch, Marius Greitschus,
     Jochen Hoenicke, Yong Li, Alexander Nutz, Betim Musa, Christian
     Schilling, Tanja Schindler, Andreas Podelski: Ultimate Automizer
     and the Search for Perfect Interpolants - (Competition Contribution).
     TACAS (2) 2018: 447-451
[3] Matthias Heizmann, Jochen Hoenicke, Andreas Podelski: Software Model
     Checking for People Who Love Automata. CAV 2013:36-52
[4] https://github.com/sosy-lab/sv-benchmarks
[5] Dirk Beyer: Automatic Verification of C and Java Programs: SV-COMP 2019.
     TACAS (3) 2019: 133-155
[6] https://sv-comp.sosy-lab.org/2019/
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Benchmark
Size9652
Compressed Size2047
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 9644
Compressed Size2035
Max. Term Depth70
Asserts 2
Declared Functions0
Declared Constants53
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

not1 or1 and1 =2
let43 mod4 +24 <=2
select48 store44

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 0.50 (2/4) Alt-Ergo Alt-Ergo-SMTComp-2020_default unknown ❌ 0.05178 0.14391
CVC4 CVC4-sq-final_default sat ✅ 22.75770 22.73930
CVC4-2019-06-03-d350fe1-wrapped-sq_default sat ✅ 7.44916 7.44898
MathSAT MathSAT5_default.sh sat ✅ 0.05471 0.05421
Z3 z3-4.8.8_default unknown ❌ 1200.03000 1199.81000
SMT-COMP 2021 0.25 (3/4) CVC4 CVC4-2019-06-03-d350fe1-wrapped-sq_default sat ✅ 5.35601 5.35636
CVC4-sq-final_default sat ✅ 3.54792 3.54810
cvc5 cvc5-fixed_default sat ✅ 5.02225 5.01694
MathSAT mathsat-5.6.6_default sat ✅ 0.05240 0.05239
Z3 z3-4.8.11_default unknown ❌ 1200.03000 1199.69000
SMT-COMP 2022 0.25 (3/4) CVC4 CVC4-sq-final_default sat ✅ 3.25450 3.25458
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 31.89040 31.89090
MathSAT MathSAT-5.6.8_default sat ✅ 0.05242 0.05239
Z3 z3-4.8.17_default unknown ❌ 1200.08000 1199.93000
SMT-COMP 2023 CVC4 CVC4-sq-final_default sat ✅ 4.52999 4.52335
cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 15.48360 15.48260
SMTInterpol smtinterpol-2.5-1272-g2d6d356c_default sat ✅ 0.45720 0.77863
Yices2 Yices 2 for SMTCOMP 2023_default sat ✅ 0.34423 0.34419
SMT-COMP 2024 cvc5 cvc5 sat ✅ 3.46756 3.36801
SMTInterpol SMTInterpol sat ✅ 0.52172 0.70791
Yices2 Yices2 sat ✅ 0.40361 0.30397
SMT-COMP 2025 cvc5 cvc5 sat ✅ 9.42844 9.30726
SMTInterpol SMTInterpol sat ✅ 0.53583 0.81082
Yices2 Yices2 sat ✅ 0.56747 0.44250