Benchmark

non-incremental/UFDTNIA/20241211-verus/systems/mimalloc-smt-segment__segment_alloclib_segment.segment_alloc._02.smt2

Benchmarks generated by the Rust verifier Verus (https://verus-lang.github.io/verus/guide/) on the project Verus Systems (https://dl.acm.org/doi/10.1145/3694715.3695952) and processed using Mariposa (https://github.com/secure-foundations/mariposa). z3 solves this without nonlinear, but it cannot be expressed in SMTLib without a nonlinear theory.
This benchmarks was originally run with z3 with the following options:
    (set-option :auto_config false)
    (set-option :smt.mbqi false)
    (set-option :smt.case_split 3)
    (set-option :smt.qi.eager_threshold 100.0)
    (set-option :smt.delay_units true)
    (set-option :smt.arith.solver 2)
    (set-option :smt.arith.nl false)
    (set-option :pi.enabled false)
    (set-option :rewriter.sort_disjunctions false)
    (set-option :smt.arith.solver 6)
Benchmark
Size882666
Compressed Size85640
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2025-08-11
Generated ByAmar Shah
Generated On2024-12-11 00:00:00
GeneratorVerus
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unsat
Inferred Status unsat
Size 882658
Compressed Size85649
Max. Term Depth36
Asserts 1818
Declared Functions946
Declared Constants687
Declared Sorts 72
Defined Functions36
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes76

Symbols

true32 false23 Bool67 ite25
not67 or8 and685 =>1115
=1323 distinct1 forall1484 exists1
let206 Int153 div1 mod1
+2 -11 *1 <46
<=116 >5 >=4

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2025 0.33 (2/3) cvc5 cvc5 unsat ✅ 11.83285 11.70845
iProver iProver v3.9.3 unsat ✅ 2.37914 7.24514
SMTInterpol SMTInterpol unknown ❌ 331.08183 1247.59324