Benchmark
non-incremental/QF_LIA/RWS/Example_14.txt.smt2
Christoph Erkinger, "Rotating Workforce Scheduling as Satisfiability Modulo
Theories", Master's Thesis, Technische Universitaet Wien, 2013
| Benchmark |
|---|
| Size | 143465 |
| Compressed Size | 9876 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2014-07-21 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | sat |
| Size | 143457 |
| Compressed Size | 9778 |
| Max. Term Depth | 5 |
| Asserts | 1463 |
| Declared Functions | 0 |
| Declared Constants | 91 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
true | 1365 |
ite | 1365 |
not | 2548 |
or | 91 |
and | 1638 |
= | 6286 |
+ | 7 |
| |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2014
|
|
CVC4 |
CVC4 f7118b2 default |
sat ✅
|
2.35389
|
2.34464
|
| |
MathSAT |
MathSAT-5.2.12-Main default |
sat ✅
|
6.93167
|
6.92295
|
| |
SMTInterpol |
smtinterpol-2.1-118-g3dada2f default |
sat ✅
|
1070.45000
|
1101.36000
|
| |
veriT |
veriT-smtcomp2014 default |
sat ✅
|
0.97203
|
0.96285
|
| |
Yices2 |
Yices-2.2.1-smtcomp2014 default |
sat ✅
|
0.30171
|
0.29295
|
| |
Z3 |
Z3-4.3.2.a054b099c1d6-x64-debian-6.0.6-SMT-COMP-2014 default |
sat ✅
|
0.35566
|
0.34695
|
|
SMT-COMP 2015
|
0.14 (6/7) |
CVC4 |
CVC4-master-2015-06-15-9b32405-main default |
sat ✅
|
2.57038
|
2.56961
|
| |
|
CVC4-experimental-2015-06-15-ff5745a-main default |
sat ✅
|
2.56508
|
2.56361
|
| |
MathSAT |
MathSat 5.3.6 main smtcomp2015_main |
sat ✅
|
24.72280
|
24.73420
|
| |
SMTInterpol |
SMTInterpol v2.1-206-g86e9531 default |
sat ✅
|
1647.13000
|
1719.09000
|
| |
SMT-RAT |
SMT-RAT-final default |
unknown ❌
|
2400.01000
|
2400.95000
|
| |
veriT |
veriT default |
sat ✅
|
0.62364
|
0.62290
|
| |
Yices2 |
Yices default |
sat ✅
|
0.73331
|
0.73289
|
| |
Z3 |
z3 4.4.0 default |
sat ✅
|
0.93000
|
0.93086
|
|
SMT-COMP 2016
|
0.25 (6/8) |
CVC4 |
CVC4-master-2016-05-27-cfef263-main default |
sat ✅
|
2.95470
|
2.95676
|
| |
MathSAT |
mathsat-5.3.11-linux-x86_64-Main default |
sat ✅
|
7.89015
|
7.89555
|
| |
ProB |
ProB competition |
unknown ❌
|
2400.03000
|
2401.66000
|
| |
SMTInterpol |
smtinterpol-2.1-258-g92ab3df default |
sat ✅
|
943.79400
|
974.29600
|
| |
SMT-RAT |
SMT-RAT default |
unknown ❌
|
2400.03000
|
2401.36000
|
| |
veriT |
veriT-dev default |
sat ✅
|
1.00769
|
1.00861
|
| |
Yices2 |
Yices-2.4.2 default |
sat ✅
|
0.46835
|
0.46861
|
| |
Z3 |
z3-4.4.1 default |
sat ✅
|
0.52526
|
0.52685
|
|
SMT-COMP 2017
|
0.29 (5/7) |
CVC4 |
CVC4-smtcomp2017-main default |
sat ✅
|
1.73311
|
1.73306
|
| |
MathSAT |
mathsat-5.4.1-linux-x86_64-Main default |
sat ✅
|
11.27460
|
11.27390
|
| |
SMTInterpol |
SMTInterpol default |
unknown ❌
|
600.02400
|
622.83000
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.01200
|
599.99100
|
| |
veriT |
veriT-2017-06-17 default |
sat ✅
|
0.59334
|
0.59245
|
| |
Yices2 |
Yices2-Main default |
sat ✅
|
0.42055
|
0.41665
|
| |
Z3 |
z3-4.5.0 default |
sat ✅
|
0.90111
|
0.90049
|
|
SMT-COMP 2018
|
0.25 (6/8) |
Ctrl-Ergo |
Ctrl-Ergo-SMTComp-2018_default |
sat ✅
|
205.18500
|
815.95000
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
sat ✅
|
3.23942
|
3.23879
|
| |
MathSAT |
mathsat-5.5.2-linux-x86_64-Main_default |
sat ✅
|
18.01220
|
18.01180
|
| |
SMTInterpol |
SMTInterpol-2.5-19-g0d39cdee_default |
unknown ❌
|
1200.03000
|
1231.57000
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.03000
|
1199.96000
|
| |
veriT |
veriT_default |
sat ✅
|
2.41047
|
2.41049
|
| |
Yices2 |
Yices 2.6.0_default |
sat ✅
|
0.58415
|
0.58407
|
| |
Z3 |
z3-4.7.1_default |
sat ✅
|
0.55146
|
0.55144
|
|
SMT-COMP 2019
|
0.25 (6/8) |
Ctrl-Ergo |
Ctrl-Ergo-2019-wrapped-sq_default |
sat ✅
|
74.07200
|
294.16000
|
| |
CVC4 |
CVC4-2019-06-03-d350fe1-wrapped-sq_default |
sat ✅
|
1.66247
|
1.66236
|
| |
|
CVC4-SymBreak_03_06_2019-wrapped-sq_default |
sat ✅
|
6.08190
|
6.07937
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
0.62971
|
1.81000
|
| |
ProB |
ProB-wrapped-sq_default |
unknown ❌
|
2400.02000
|
2399.71000
|
| |
SMTInterpol |
smtinterpol-2.5-514-wrapped-sq_default |
unknown ❌
|
2400.12000
|
2462.66000
|
| |
veriT |
veriT-wrapped-sq_default |
sat ✅
|
2.15128
|
2.15155
|
| |
Yices2 |
Yices 2.6.2-wrapped-sq_default |
sat ✅
|
0.64629
|
0.64622
|
| |
Z3 |
z3-4.8.4-d6df51951f4c-wrapped-sq_default |
sat ✅
|
1.89003
|
1.88986
|
|
SMT-COMP 2023
|
0.17 (5/6) |
cvc5 |
cvc5-default-2023-05-16-ea045f305_sq |
sat ✅
|
1.46925
|
1.46958
|
| |
OpenSMT |
OpenSMT a78dcf01_default |
sat ✅
|
2.33029
|
2.33015
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
0.42697
|
0.00638
|
| |
SMTInterpol |
smtinterpol-2.5-1272-g2d6d356c_default |
unknown ❌
|
1200.06000
|
2746.30000
|
| |
Yices2 |
Yices 2 for SMTCOMP 2023_default |
sat ✅
|
0.69115
|
0.69114
|
| |
Z3++ |
Z3++_sq_0526_default |
sat ✅
|
1.63820
|
1.63815
|