Benchmark
non-incremental/QF_LIA/RWS/Example_7.txt.smt2
Christoph Erkinger, "Rotating Workforce Scheduling as Satisfiability Modulo
Theories", Master's Thesis, Technische Universitaet Wien, 2013
| Benchmark |
| Size | 304165 |
| Compressed Size | 18041 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2014-07-21 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | None |
| Size | 304157 |
| Compressed Size | 18045 |
| Max. Term Depth | 5 |
| Asserts | 2849 |
| Declared Functions | 0 |
| Declared Constants | 203 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
true | 2639 |
ite | 2639 |
not | 5278 |
or | 203 |
and | 3248 |
= | 13405 |
+ | 7 |
| |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2014
|
1.00 (0/6) |
CVC4 |
CVC4 f7118b2 default |
unknown ❌
|
2399.21000
|
2400.09000
|
| |
MathSAT |
MathSAT-5.2.12-Main default |
unknown ❌
|
2399.21000
|
2400.03000
|
| |
SMTInterpol |
smtinterpol-2.1-118-g3dada2f default |
unknown ❌
|
2344.52000
|
2400.02000
|
| |
veriT |
veriT-smtcomp2014 default |
unknown ❌
|
2399.51000
|
2400.04000
|
| |
Yices2 |
Yices-2.2.1-smtcomp2014 default |
unknown ❌
|
2399.12000
|
2400.08000
|
| |
Z3 |
Z3-4.3.2.a054b099c1d6-x64-debian-6.0.6-SMT-COMP-2014 default |
unknown ❌
|
2399.12000
|
2400.06000
|
|
SMT-COMP 2015
|
1.00 (0/7) |
CVC4 |
CVC4-master-2015-06-15-9b32405-main default |
unknown ❌
|
2400.01000
|
2400.77000
|
| |
|
CVC4-experimental-2015-06-15-ff5745a-main default |
unknown ❌
|
2400.01000
|
2400.59000
|
| |
MathSAT |
MathSat 5.3.6 main smtcomp2015_main |
unknown ❌
|
2400.02000
|
2401.17000
|
| |
SMTInterpol |
SMTInterpol v2.1-206-g86e9531 default |
unknown ❌
|
2400.03000
|
7751.10000
|
| |
SMT-RAT |
SMT-RAT-final default |
unknown ❌
|
2400.01000
|
2400.57000
|
| |
veriT |
veriT default |
unknown ❌
|
2400.01000
|
2400.60000
|
| |
Yices2 |
Yices default |
unknown ❌
|
2400.01000
|
2401.01000
|
| |
Z3 |
z3 4.4.0 default |
unknown ❌
|
2400.02000
|
2400.92000
|
|
SMT-COMP 2016
|
1.00 (0/8) |
CVC4 |
CVC4-master-2016-05-27-cfef263-main default |
unknown ❌
|
2400.02000
|
2401.24000
|
| |
MathSAT |
mathsat-5.3.11-linux-x86_64-Main default |
unknown ❌
|
2400.11000
|
2401.68000
|
| |
ProB |
ProB competition |
unknown ❌
|
2400.02000
|
2401.60000
|
| |
SMTInterpol |
smtinterpol-2.1-258-g92ab3df default |
unknown ❌
|
2400.17000
|
2594.78000
|
| |
SMT-RAT |
SMT-RAT default |
unknown ❌
|
2400.04000
|
2401.41000
|
| |
veriT |
veriT-dev default |
unknown ❌
|
2400.08000
|
2401.32000
|
| |
Yices2 |
Yices-2.4.2 default |
unknown ❌
|
2400.03000
|
2401.37000
|
| |
Z3 |
z3-4.4.1 default |
unknown ❌
|
2400.02000
|
2401.36000
|
|
SMT-COMP 2017
|
1.00 (0/7) |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.01600
|
599.80000
|
| |
MathSAT |
mathsat-5.4.1-linux-x86_64-Main default |
unknown ❌
|
600.03200
|
599.99000
|
| |
SMTInterpol |
SMTInterpol default |
unknown ❌
|
600.03800
|
637.27000
|
| |
SMT-RAT |
SMTRAT-comp2017_2 default |
unknown ❌
|
600.01100
|
599.95000
|
| |
veriT |
veriT-2017-06-17 default |
unknown ❌
|
600.04000
|
599.85000
|
| |
Yices2 |
Yices2-Main default |
unknown ❌
|
600.02100
|
599.94400
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.10100
|
600.01000
|
|
SMT-COMP 2018
|
1.00 (0/8) |
Ctrl-Ergo |
Ctrl-Ergo-SMTComp-2018_default |
unknown ❌
|
1200.04000
|
4773.00000
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.01000
|
1199.92000
|
| |
MathSAT |
mathsat-5.5.2-linux-x86_64-Main_default |
unknown ❌
|
1200.01000
|
1199.72000
|
| |
SMTInterpol |
SMTInterpol-2.5-19-g0d39cdee_default |
unknown ❌
|
1200.03000
|
1282.83000
|
| |
SMT-RAT |
SMTRAT-Rat-final_default |
unknown ❌
|
1200.02000
|
1199.88000
|
| |
veriT |
veriT_default |
unknown ❌
|
1200.03000
|
1199.82000
|
| |
Yices2 |
Yices 2.6.0_default |
unknown ❌
|
1200.01000
|
1199.93000
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.01000
|
1199.96000
|
|
SMT-COMP 2019
|
1.00 (0/8) |
Ctrl-Ergo |
Ctrl-Ergo-2019-wrapped-sq_default |
unknown ❌
|
2400.10000
|
9513.52000
|
| |
CVC4 |
CVC4-2019-06-03-d350fe1-wrapped-sq_default |
unknown ❌
|
2400.10000
|
2399.50000
|
| |
|
CVC4-SymBreak_03_06_2019-wrapped-sq_default |
unknown ❌
|
2400.02000
|
2399.69000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
2400.17000
|
7198.58000
|
| |
ProB |
ProB-wrapped-sq_default |
unknown ❌
|
2400.04000
|
2399.91000
|
| |
SMTInterpol |
smtinterpol-2.5-514-wrapped-sq_default |
unknown ❌
|
2400.02000
|
2511.00000
|
| |
veriT |
veriT-wrapped-sq_default |
unknown ❌
|
2400.05000
|
2399.72000
|
| |
Yices2 |
Yices 2.6.2-wrapped-sq_default |
unknown ❌
|
2400.03000
|
2400.07000
|
| |
Z3 |
z3-4.8.4-d6df51951f4c-wrapped-sq_default |
unknown ❌
|
2400.11000
|
2399.80000
|
|
SMT-COMP 2023
|
1.00 (0/6) |
cvc5 |
cvc5-default-2023-05-16-ea045f305_sq |
unknown ❌
|
1200.02000
|
1199.74000
|
| |
OpenSMT |
OpenSMT a78dcf01_default |
unknown ❌
|
1200.01000
|
1199.76000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.06000
|
3599.73000
|
| |
SMTInterpol |
smtinterpol-2.5-1272-g2d6d356c_default |
unknown ❌
|
1200.11000
|
2828.05000
|
| |
Yices2 |
Yices 2 for SMTCOMP 2023_default |
unknown ❌
|
1200.02000
|
1199.90000
|
| |
Z3++ |
Z3++_sq_0526_default |
unknown ❌
|
1200.08000
|
1200.02000
|
|
SMT-COMP 2025
|
1.00 (0/6) |
cvc5 |
cvc5 |
unknown ❌
|
1201.79348
|
1201.05549
|
| |
OpenSMT |
OpenSMT |
unknown ❌
|
1201.34241
|
1201.08203
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
1201.87640
|
2735.61195
|
| |
Yices2 |
Yices2 |
unknown ❌
|
1201.25112
|
1200.95945
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.00556
|
4802.33511
|
| |
Z3 |
Z3-alpha-base |
unknown ❌
|
1201.28618
|
1201.00343
|