Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_3779_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size5756
Compressed Size1251
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 5748
Compressed Size1238
Max. Term Depth4
Asserts 49
Declared Functions0
Declared Constants62
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or7 =66 str.++25 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 0.50 (1/2) CVC4 CVC4-sq-final_default sat ✅ 32.18290 32.18100
Z3string Z3str4 SMTCOMP2020 v1.1_default unknown ❌ 1200.05000 1199.96000
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 6.28466 6.28365
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 9.15888 9.15886
OSTRICH OSTRICH 1.2_def sat ✅ 46.90080 72.87560
Z3 z3-4.8.17_default sat ✅ 0.05250 0.05431
Z3string Z3str4_default sat ✅ 0.06954 0.06964
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 3.21192 3.20709
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 3.22305 3.21803
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 47.65250 88.99010
Z3alpha z3alpha_default sat ✅ 0.22978 0.22985
Z3-Noodler Z3-Noodler_default sat ✅ 0.07355 0.07345
Z3-Noodler_default sat ✅ 0.06865 0.06861
SMT-COMP 2024 cvc5 cvc5 sat ✅ 300.40642 300.25509
OSTRICH OSTRICH sat ✅ 12.11740 36.76100
Z3alpha Z3-alpha sat ✅ 0.29540 0.19590
Z3-Noodler Z3-Noodler sat ✅ 0.25284 0.15297