Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4145_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size2084
Compressed Size779
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 2076
Compressed Size786
Max. Term Depth4
Asserts 11
Declared Functions0
Declared Constants13
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=10 str.++6 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.04687 0.04719
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.06607 0.06660
OSTRICH OSTRICH 1.2_def sat ✅ 5.07368 14.57710
Z3 z3-4.8.17_default sat ✅ 0.04211 0.04384
Z3string Z3str4_default sat ✅ 0.04401 0.04411
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.04355 0.04408
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.07007 0.07046
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 5.18748 15.11410
Z3alpha z3alpha_default sat ✅ 0.02997 0.03004
Z3-Noodler Z3-Noodler_default sat ✅ 0.03704 0.03700
Z3-Noodler_default sat ✅ 0.03635 0.03629
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.25464 0.15521
OSTRICH OSTRICH sat ✅ 3.38490 8.94670
Z3alpha Z3-alpha sat ✅ 38.66964 38.55194
Z3-Noodler Z3-Noodler sat ✅ 0.27122 0.17010