Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_3310_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size1892
Compressed Size789
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 1884
Compressed Size787
Max. Term Depth4
Asserts 8
Declared Functions0
Declared Constants9
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=7 str.++4 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.03329 0.03362
cvc5 cvc5-fixed_default sat ✅ 0.03706 0.03756
Z3 z3-4.8.11_default sat ✅ 0.04019 0.04010
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 1.29464 1.29470
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.03089 0.03143
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.04756 0.04815
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 4.45911 12.69670
Z3alpha z3alpha_default sat ✅ 0.02696 0.02702
Z3-Noodler Z3-Noodler_default sat ✅ 0.03628 0.03623
Z3-Noodler_default sat ✅ 0.03672 0.03667
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.25486 0.15535
OSTRICH OSTRICH sat ✅ 3.29284 8.36687
Z3alpha Z3-alpha sat ✅ 0.28008 0.18066
Z3-Noodler Z3-Noodler sat ✅ 0.24601 0.14620