Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_2980_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size2182
Compressed Size791
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 2174
Compressed Size792
Max. Term Depth4
Asserts 7
Declared Functions0
Declared Constants7
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=6 str.++3 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.03042 0.03070
cvc5 cvc5-fixed_default sat ✅ 0.03038 0.03092
Z3 z3-4.8.11_default sat ✅ 0.06012 0.05940
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 1.26646 1.26650
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.03038 0.03067
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.03247 0.03292
OSTRICH OSTRICH 1.2_def sat ✅ 3.22562 8.53195
Z3 z3-4.8.17_default sat ✅ 0.03671 0.03858
Z3string Z3str4_default sat ✅ 0.03585 0.03595
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.02308 0.02365
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.03390 0.03437
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 3.17340 8.18828
Z3alpha z3alpha_default sat ✅ 0.02072 0.02077
Z3-Noodler Z3-Noodler_default sat ✅ 0.03610 0.03601
Z3-Noodler_default sat ✅ 0.03587 0.03585
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.25056 0.15005
OSTRICH OSTRICH sat ✅ 2.69850 6.38929
Z3alpha Z3-alpha sat ✅ 0.28134 0.18148
Z3-Noodler Z3-Noodler sat ✅ 0.24303 0.14327