Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_3384_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size4412
Compressed Size958
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 4404
Compressed Size955
Max. Term Depth4
Asserts 14
Declared Functions0
Declared Constants17
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=13 str.++8 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.07004 0.07030
cvc5 cvc5-fixed_default sat ✅ 0.06867 0.06901
Z3 z3-4.8.11_default sat ✅ 0.05507 0.05500
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 2.62507 2.62500
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.05703 0.05747
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.08663 0.08723
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 6.21216 18.01000
Z3alpha z3alpha_default sat ✅ 23.14540 23.14520
Z3-Noodler Z3-Noodler_default sat ✅ 0.04523 0.04518
Z3-Noodler_default sat ✅ 0.04345 0.04342
SMT-COMP 2025 cvc5 cvc5 sat ✅ 0.28256 0.16352
OSTRICH OSTRICH sat ✅ 8.59683 23.46443
Z3alpha Z3-alpha sat ✅ 0.38119 0.31469
Z3 Z3-alpha-base sat ✅ 0.32711 0.19932
Z3-Noodler-base sat ✅ 0.30999 0.19326
Z3-Noodler Z3-Noodler sat ✅ 0.30076 0.17840
Z3-Noodler-Mocha-base sat ✅ 0.30459 0.17807
Z3-Noodler-Mocha Z3-Noodler-Mocha sat ✅ 0.30829 0.17929