Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5314_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size13047
Compressed Size1932
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 13039
Compressed Size1929
Max. Term Depth4
Asserts 25
Declared Functions0
Declared Constants31
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=24 str.++14 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.22126 0.22159
cvc5 cvc5-fixed_default sat ✅ 0.12923 0.12976
Z3 z3-4.8.11_default sat ✅ 0.19336 0.19317
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 11.43300 11.43300
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.23222 0.23206
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.10469 0.10520
OSTRICH OSTRICH 1.2_def sat ✅ 12.85800 29.56340
Z3 z3-4.8.17_default sat ✅ 0.23302 0.23479
Z3string Z3str4_default sat ✅ 0.91311 0.91321
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.06885 0.06929
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.10716 0.10757
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 16.72340 44.32980
Z3alpha z3alpha_default sat ✅ 23.18020 23.17660
Z3-Noodler Z3-Noodler_default sat ✅ 0.08616 0.08611
Z3-Noodler_default sat ✅ 0.08538 0.08510
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.24970 0.15027
OSTRICH OSTRICH sat ✅ 3.30628 9.02025
Z3alpha Z3-alpha sat ✅ 0.87460 0.77508
Z3-Noodler Z3-Noodler sat ✅ 0.29692 0.19706