Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4594_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size4990
Compressed Size1032
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 4982
Compressed Size1033
Max. Term Depth4
Asserts 24
Declared Functions0
Declared Constants32
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or3 =29 str.++12 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.19802 0.19833
cvc5 cvc5-fixed_default sat ✅ 0.18921 0.18970
Z3 z3-4.8.11_default sat ✅ 0.06212 0.06206
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 2.54633 2.54527
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.32969 0.33009
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.37700 0.37684
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 5.79077 16.88250
Z3alpha z3alpha_default sat ✅ 23.29300 23.29340
Z3-Noodler Z3-Noodler_default sat ✅ 0.04929 0.04923
Z3-Noodler_default sat ✅ 0.05042 0.05030
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.54313 0.44355
OSTRICH OSTRICH sat ✅ 3.21329 8.35390
Z3alpha Z3-alpha sat ✅ 0.31439 0.21470
Z3-Noodler Z3-Noodler sat ✅ 0.27997 0.17946