Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5405_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size9840
Compressed Size1622
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 9832
Compressed Size1627
Max. Term Depth4
Asserts 23
Declared Functions0
Declared Constants28
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or2 =24 str.++10 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 CVC4 CVC4-sq-final_default sat ✅ 0.16423 0.16453
Z3string Z3str4 SMTCOMP2020 v1.1_default sat ✅ 7.66298 8.36776
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.16288 0.16248
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.08115 0.08149
OSTRICH OSTRICH 1.2_def sat ✅ 7.18780 20.81290
Z3 z3-4.8.17_default sat ✅ 0.20096 0.20273
Z3string Z3str4_default sat ✅ 0.56309 0.56318
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.06267 0.06304
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.09297 0.09356
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 6.71952 18.91470
Z3alpha z3alpha_default sat ✅ 0.36001 0.35878
Z3-Noodler Z3-Noodler_default sat ✅ 0.06616 0.06608
Z3-Noodler_default sat ✅ 0.06506 0.06501
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.25761 0.15778
OSTRICH OSTRICH sat ✅ 3.02158 7.79639
Z3alpha Z3-alpha sat ✅ 1140.96393 1140.83982
Z3-Noodler Z3-Noodler sat ✅ 0.27487 0.17528