Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4319_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size1674
Compressed Size701
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 1666
Compressed Size711
Max. Term Depth4
Asserts 8
Declared Functions0
Declared Constants12
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=7 str.++3 str.replace1 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 CVC4 CVC4-sq-final_default sat ✅ 0.02629 0.02651
Z3string Z3str4 SMTCOMP2020 v1.1_default sat ✅ 0.66067 1.11490
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.02709 0.02743
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.03425 0.03481
OSTRICH OSTRICH 1.2_def sat ✅ 2.76529 6.67815
Z3 z3-4.8.17_default sat ✅ 0.03447 0.03624
Z3string Z3str4_default sat ✅ 0.02560 0.02563
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.24608 0.14640
OSTRICH OSTRICH sat ✅ 2.51208 5.51111
Z3alpha Z3-alpha sat ✅ 0.27380 0.17396
Z3-Noodler Z3-Noodler sat ✅ 0.25558 0.15582