Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5041_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size6260
Compressed Size1256
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 6252
Compressed Size1265
Max. Term Depth4
Asserts 11
Declared Functions0
Declared Constants13
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=10 str.++6 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 CVC4 CVC4-sq-final_default sat ✅ 0.10425 0.10455
Z3string Z3str4 SMTCOMP2020 v1.1_default sat ✅ 5.50928 6.20481
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.10454 0.10487
cvc5 cvc5-fixed_default sat ✅ 0.07135 0.07189
Z3 z3-4.8.11_default sat ✅ 0.05509 0.05503
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 3.19142 3.19130
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.10363 0.10395
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.06966 0.06913
OSTRICH OSTRICH 1.2_def sat ✅ 6.27458 18.27600
Z3 z3-4.8.17_default sat ✅ 0.06042 0.06220
Z3string Z3str4_default sat ✅ 0.23724 0.23727