Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_1837_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size1418
Compressed Size631
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 1410
Compressed Size622
Max. Term Depth4
Asserts 7
Declared Functions0
Declared Constants11
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or1 =7 str.++2 str.replace1
re.allchar2 str.to_re1 re.*2 re.++2
str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.12428 0.12464
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.12239 0.12279
OSTRICH OSTRICH 1.2_def sat ✅ 2.54634 5.52864
Z3 z3-4.8.17_default sat ✅ 0.04826 0.04990
Z3string Z3str4_default sat ✅ 0.22729 0.22737
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.09096 0.09138
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.11361 0.11391
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 2.53167 5.86601
Z3alpha z3alpha_default sat ✅ 0.05778 0.05785
Z3-Noodler Z3-Noodler_default sat ✅ 0.03795 0.03790
Z3-Noodler_default sat ✅ 0.03880 0.03852
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.28334 0.18403
OSTRICH OSTRICH sat ✅ 2.24407 4.93422
Z3alpha Z3-alpha sat ✅ 0.30183 0.20182
Z3-Noodler Z3-Noodler sat ✅ 0.25133 0.15135