Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_3682_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size4044
Compressed Size955
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 4036
Compressed Size952
Max. Term Depth4
Asserts 32
Declared Functions0
Declared Constants46
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or1 =40 str.++17 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 1.39115 1.38435
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 1.13175 1.13225
OSTRICH OSTRICH 1.2_def sat ✅ 4.06265 11.34050
Z3 z3-4.8.17_default sat ✅ 0.03839 0.04021
Z3string Z3str4_default sat ✅ 0.03136 0.03144
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 1.63359 1.63408
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 1.63965 1.63820
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 4.18749 11.83910
Z3alpha z3alpha_default sat ✅ 0.02109 0.02117
Z3-Noodler Z3-Noodler_default sat ✅ 0.03937 0.03933
Z3-Noodler_default sat ✅ 0.03995 0.03987
SMT-COMP 2025 cvc5 cvc5 sat ✅ 1.00561 0.87991
OSTRICH OSTRICH sat ✅ 17.81254 40.01255
Z3alpha Z3-alpha sat ✅ 0.40528 0.28806
Z3 Z3-alpha-base sat ✅ 0.31048 0.18434
Z3-Noodler-base sat ✅ 0.26188 0.14288
Z3-Noodler Z3-Noodler sat ✅ 0.29855 0.17111
Z3-Noodler-Mocha-base sat ✅ 0.26747 0.14764
Z3-Noodler-Mocha Z3-Noodler-Mocha sat ✅ 0.30640 0.17402