Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5401_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size8951
Compressed Size1586
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 8943
Compressed Size1590
Max. Term Depth4
Asserts 8
Declared Functions0
Declared Constants9
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=7 str.++4 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.24674 0.24711
cvc5 cvc5-fixed_default sat ✅ 0.10539 0.10594
Z3 z3-4.8.11_default sat ✅ 0.07696 0.07693
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 4.80586 4.80556
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.03218 0.03275
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.04893 0.04948
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 5.85015 17.18180
Z3alpha z3alpha_default sat ✅ 1.93239 1.93216
Z3-Noodler Z3-Noodler_default sat ✅ 0.07793 0.07787
Z3-Noodler_default sat ✅ 0.07411 0.07406
SMT-COMP 2025 cvc5 cvc5 sat ✅ 0.29148 0.17136
OSTRICH OSTRICH sat ✅ 26.91484 53.43353
Z3alpha Z3-alpha sat ✅ 0.43896 0.43369
Z3 Z3-alpha-base sat ✅ 0.32833 0.20951
Z3-Noodler-base sat ✅ 0.31512 0.18630
Z3-Noodler Z3-Noodler sat ✅ 0.32776 0.19709
Z3-Noodler-Mocha-base sat ✅ 0.32325 0.19677
Z3-Noodler-Mocha Z3-Noodler-Mocha sat ✅ 0.28445 0.16493