Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5358_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size5060
Compressed Size1121
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 5052
Compressed Size1127
Max. Term Depth4
Asserts 16
Declared Functions0
Declared Constants19
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or1 =16 str.++8 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.07319 0.07352
cvc5 cvc5-fixed_default sat ✅ 0.06527 0.06582
Z3 z3-4.8.11_default sat ✅ 0.07717 0.07713
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 2.38216 2.38219
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.04929 0.04975
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.08042 0.08085
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 7.02438 19.62030
Z3alpha z3alpha_default sat ✅ 23.10170 23.10160
Z3-Noodler Z3-Noodler_default sat ✅ 0.04759 0.04752
Z3-Noodler_default sat ✅ 0.04767 0.04760
SMT-COMP 2025 cvc5 cvc5 sat ✅ 0.30501 0.18429
OSTRICH OSTRICH sat ✅ 8.89667 20.91322
Z3alpha Z3-alpha sat ✅ 0.38559 0.32429
Z3 Z3-alpha-base sat ✅ 0.34949 0.22365
Z3-Noodler-base sat ✅ 0.32658 0.20190
Z3-Noodler Z3-Noodler sat ✅ 0.30805 0.18019
Z3-Noodler-Mocha-base sat ✅ 0.30255 0.17989
Z3-Noodler-Mocha Z3-Noodler-Mocha sat ✅ 0.29343 0.17289