Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5400_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size9385
Compressed Size1612
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 9377
Compressed Size1621
Max. Term Depth4
Asserts 13
Declared Functions0
Declared Constants17
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=12 str.++7 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.15488 0.15520
cvc5 cvc5-fixed_default sat ✅ 0.08893 0.08948
Z3 z3-4.8.11_default sat ✅ 0.07640 0.07634
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 6.33770 6.33725
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.04553 0.04607
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.06939 0.06988
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 6.41558 18.49970
Z3alpha z3alpha_default sat ✅ 0.07423 0.07426
Z3-Noodler Z3-Noodler_default sat ✅ 0.07652 0.07644
Z3-Noodler_default sat ✅ 0.07546 0.07538
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.23782 0.13834
OSTRICH OSTRICH sat ✅ 3.03911 7.80834
Z3alpha Z3-alpha sat ✅ 0.60569 0.50583
Z3-Noodler Z3-Noodler sat ✅ 0.28017 0.18079