Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_3470_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size4295
Compressed Size1001
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 4287
Compressed Size994
Max. Term Depth4
Asserts 33
Declared Functions0
Declared Constants49
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or1 =42 str.++16 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.45811 0.45846
cvc5 cvc5-fixed_default sat ✅ 1.47996 1.48056
Z3 z3-4.8.11_default sat ✅ 0.03580 0.03576
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 0.13407 0.13416
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 6.50177 6.49732
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 6.37685 6.37574
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 3.60382 9.90882
Z3alpha z3alpha_default sat ✅ 0.02306 0.02280
Z3-Noodler Z3-Noodler_default sat ✅ 0.03864 0.03860
Z3-Noodler_default sat ✅ 0.03790 0.03786
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.98929 0.88989
OSTRICH OSTRICH sat ✅ 2.79907 7.01957
Z3alpha Z3-alpha sat ✅ 0.27160 0.17216
Z3-Noodler Z3-Noodler sat ✅ 0.24349 0.14366