Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5549_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size2978
Compressed Size861
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 2970
Compressed Size860
Max. Term Depth4
Asserts 19
Declared Functions0
Declared Constants19
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or3 =32 str.++4 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 0.50 (1/2) CVC4 CVC4-sq-final_default sat ✅ 0.24345 0.24378
Z3string Z3str4 SMTCOMP2020 v1.1_default unknown ❌ 1200.11000 1199.80000
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.18649 0.18677
cvc5 cvc5-fixed_default sat ✅ 0.10012 0.10051
Z3 z3-4.8.11_default sat ✅ 0.46252 0.46242
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 0.11637 0.11650
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.26224 0.16089
OSTRICH OSTRICH sat ✅ 2.69897 6.38742
Z3alpha Z3-alpha sat ✅ 0.45251 0.35306
Z3-Noodler Z3-Noodler sat ✅ 0.26163 0.16153