Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4263_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size27343
Compressed Size3187
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 27335
Compressed Size3199
Max. Term Depth4
Asserts 58
Declared Functions0
Declared Constants82
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or4 =69 str.++29 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 84.51940 84.51600
cvc5 cvc5-fixed_default sat ✅ 112.46000 112.46800
Z3 z3-4.8.11_default sat ✅ 5.77839 5.77832
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 75.84590 75.83960
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 310.35900 302.10800
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 247.18700 247.09800
OSTRICH OSTRICH 1.2_def sat ✅ 162.74800 198.13900
Z3 z3-4.8.17_default sat ✅ 2.92241 2.92362
Z3string Z3str4_default sat ✅ 3.05271 3.05257
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 312.83700 301.78900
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 319.56600 301.73500
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 200.55500 380.57900
Z3alpha z3alpha_default sat ✅ 23.95010 23.95060
Z3-Noodler Z3-Noodler_default sat ✅ 0.17571 0.17561
Z3-Noodler_default sat ✅ 0.15028 0.15024