Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_1830_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size1554
Compressed Size657
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 1546
Compressed Size668
Max. Term Depth4
Asserts 9
Declared Functions0
Declared Constants13
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or2 =10 str.++2 str.replace1
re.allchar2 str.to_re1 re.*2 re.++2
str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.13432 0.12004
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.14475 0.14520
OSTRICH OSTRICH 1.2_def sat ✅ 2.39389 5.31147
Z3 z3-4.8.17_default sat ✅ 0.07948 0.08152
Z3string Z3str4_default sat ✅ 0.03046 0.03055
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.19812 0.19592
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.14166 0.14220
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 2.45120 5.48138
Z3alpha z3alpha_default sat ✅ 0.03377 0.03382
Z3-Noodler Z3-Noodler_default sat ✅ 0.03831 0.03824
Z3-Noodler_default sat ✅ 0.03692 0.03687
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.27559 0.17596
OSTRICH OSTRICH sat ✅ 2.35244 5.28870
Z3alpha Z3-alpha sat ✅ 0.43188 0.33211
Z3-Noodler Z3-Noodler sat ✅ 0.24485 0.14493