Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_2282_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size5769
Compressed Size1321
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 5761
Compressed Size1339
Max. Term Depth4
Asserts 53
Declared Functions0
Declared Constants56
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or8 =69 str.++22 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 CVC4 CVC4-sq-final_default sat ✅ 4.07378 4.07406
Z3string Z3str4 SMTCOMP2020 v1.1_default sat ✅ 0.59941 0.75769
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 14.08380 14.08300
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 7.01066 7.01038
OSTRICH OSTRICH 1.2_def sat ✅ 3.88944 10.98950
Z3 z3-4.8.17_default sat ✅ 0.08225 0.08456
Z3string Z3str4_default sat ✅ 0.04080 0.04088
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 2.64524 2.64537
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 2.69339 2.69363
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 4.17925 11.73080
Z3alpha z3alpha_default sat ✅ 0.03109 0.03116
Z3-Noodler Z3-Noodler_default sat ✅ 0.04620 0.04616
Z3-Noodler_default sat ✅ 0.04509 0.04500