Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_1406_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size7269
Compressed Size1344
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 7261
Compressed Size1336
Max. Term Depth4
Asserts 52
Declared Functions0
Declared Constants56
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or2 =53 str.++25 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.06612 0.06642
cvc5 cvc5-fixed_default sat ✅ 0.06301 0.06344
Z3 z3-4.8.11_default sat ✅ 0.08498 0.08493
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 2.73971 2.73943
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.04840 0.04882
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.07579 0.07619
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 5.51055 16.32300
Z3alpha z3alpha_default sat ✅ 23.43300 23.43190
Z3-Noodler Z3-Noodler_default sat ✅ 0.04932 0.04922
Z3-Noodler_default sat ✅ 0.04641 0.04632
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.26522 0.16540
OSTRICH OSTRICH sat ✅ 3.56232 9.61001
Z3alpha Z3-alpha sat ✅ 1159.06673 1158.70454
Z3-Noodler Z3-Noodler sat ✅ 0.25411 0.15443